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(HP71B) ASM question
07-15-2024, 04:50 PM (This post was last modified: 08-03-2024 06:01 PM by floppy.)
Post: #1
(HP71B) ASM question
Hello,

I have here few ASM words (yes, looks similar to HP41 especially the total rekall module fcts).

Code:
       FORTH
*
* columns..
* 1:label  8:mnemonic  15:modifier  from 24:comments
*
* FORTH entry points:
CHS    EQU #E1518            change X sign; dont change LastX
NUMST  EQU #E1718            GET X INTO (A,B); L := X
FEND   EQU #E08E9            PUTABX,GETFP
PUTABX EQU #E72F5            Put (A,B) into X, .. GETFP
GETX   EQU #E728A            Put X into (A,B) 
GETX+L EQU #E72DF            Put X into (A,B) and X in L
SAVEFP EQU #E717A            save Forth pointer
GETFP  EQU #E71A5            restore Forth pointers
* System entry points: see 14-1 of IMS Vol 1
AD2-15 EQU #0C363            15-digit add
MP2-15 EQU #0C43A            15-digit multiply
DV2-15 EQU #0C4AC            15-digit divise
* DV15S  EQU #0C4B2            
SPLITA EQU #0C6BF            Extend (A) into (A,B)
SPLTAC EQU #0C934            Extend (A) and (C) into (A,B) % (C,D)
SPLITC EQU #0C940            Extend (C) into (C,D)
RES12  EQU #0C994            Reduce (A,B) into (C)
* addresses
* MTHSTK EQU #2F599            data stack
OX     EQU #2FBD0            X address
OZ     EQU #2FBF0            Z address
*
* CLX : set X to zero. LastX not modified (see HP41). tested 15july24
       WORD 'CLX'
       GOSBVL SAVEFP
       P=     0
       LC(5)  OX             put X-address into field A of register C
*                               low order 5 nibbles
       CD0EX                 exchange data pointer address D0 with C(A)
       A=0    W
       DAT0=A W
       D0=C
       GOSBVL GETFP
       RTNCC
*
* X*2 : multiply X by 2; X transfered to LASTX. Tested 11July2024
       WORD 'X*2'
       GOSBVL NUMST          GET X INTO (A,B), uMODES;SAVEFP;GETX+L
       C=B    W
       D=C    W
       C=A    W              copy (A,B) to (C,D)
       GOSBVL AD2-15         (A,B) + (C,D) and put result in (A,B) = X+X = 2*X
       GOSBVL PUTABX
       RTNCC
*
* X/2 : divise X by 2; X transfered to LASTX. Tested 10July2024
       WORD 'X/2'            ?? * warning: word not unique, in line 0037 
       GOSBVL NUMST          GET X INTO A(A,B), uMODES;SAVEFP;GETX+L
       C=0    W
       D=C    W
       P= 14
       D=D+1  P
       D=D+1  P              2 in Register D
       GOSBVL DV2-15         (A,B) / (C,D) = and result in (A,B)
       GOSBVL PUTABX
       RTNCC
*
* X+2 : add 2 to X ; X transfered to LASTX. Tested 10 July 2024
       WORD 'X+2'
       GOSBVL NUMST          GET X INTO A(A,B), uMODES;SAVEFP;GETX+L
       C=B    W
       D=C    W
       C=A    W              copy (A,B) to (C,D)
       A=0    W
       B=A    W
       P= 14
       B=B+1  P
       B=B+1  P              2 in Register B
       GOSBVL AD2-15         (A,B) + (C,D) and result in (A,B) = 2+X
       GOSBVL PUTABX
       RTNCC
*
* X<> exchange the value in the variable with the value in X
*       use: FVAR1 X<>   tested 15july2024
       WORD 'X<>'
       P=     0
       LC(5)  OX             put X-address into C(A)
       CD0EX                 exchange data pointer address D0 with C(A)
       R2=C                  save D0
       A=DAT0 W              A = value of X from its address in C(A)
       R0=A                  R0 = X
       C=DAT1 A              copy data at address in D1 into C(A)
       CD0EX
       A=DAT0 W              copy data at address in D0 (in C(A)) into W in A
       R1=A                  R1 = Reg value
*
       P=     0
       LC(5)  OX             put X-address into C(A)
       CD0EX                 exchange data pointer address D0 with C(A)
       A=R1
       DAT0=A W              X has now value of Reg
*
       C=DAT1 A              copy data at address in D1 into C(A)
       CD0EX                 exchange C(A) with D0
       A=R0
       DAT0=A W              value of X into reg
*
       C=R2
       D0=C                  restore D0
       D1=D1+ 5              return nothing on data stack
       RTNCC
*
* X<>Z exchange the HP41 registers, similar to X<>Y. tested 12 July 2024
       WORD 'X<>Z'
       P=     0
       LC(5)  OX             put X-address into field A of register C
*                               low order 5 nibbles
       CD0EX                 put data pointer D0 into C(A)
       R1=C                  save D0 into R1
       C=DAT0 W              C = value of X (which is in D0)
       D0=D0+ 16             D0 has now Y addr
       D0=D0+ 16             D0 has now Z addr
       A=DAT0 W              put value of Z into A via addr in D0
       DAT0=C W              Z = value of X
       D0=D0- 16
       D0=D0- 16             D0 -> X
       DAT0=A W              X = value of Z
       C=R1
       D0=C                  restore D0
       RTNCC
*
* X<>T exchange the HP41 registers, tested 12 July 2024
       WORD 'X<>T'
       P=     0
       LC(5)  OX             put X-address into field A of register C
*                               low order 5 nibbles
       CD0EX                 put data pointer D0 into C(A)
       R1=C                  save D0 into R1
       C=DAT0 W              C = value of X
       D0=D0+ 16             D0 -> Y
       D0=D0+ 16             D0 -> Z
       D0=D0+ 16             D0--> T
       A=DAT0 W              put value of T into A
       DAT0=C W              T = value of X
       D0=D0- 16
       D0=D0- 16
       D0=D0- 16             D0 -> X
       DAT0=A W              X = value of T
       C=R1
       D0=C                  restore D0
       RTNCC
*
* X<>L exchange the HP41 registers, tested 12 July 2024
       WORD 'X<>L'
       P=     0
       LC(5)  OX             put X-address into field A of register C
*                               low order 5 nibbles
       CD0EX                 put data pointer D0 into C(A)
       R1=C                  save D0 into R1
       C=DAT0 W              C = value of X
       D0=D0- 16             D0--> L
       A=DAT0 W              put value of L into A
       DAT0=C W              L = value of X
       D0=D0+ 16             D0 -> X
       DAT0=A W              X = value of L
       C=R1
       D0=C                  restore D0(A) from C(A)
       RTNCC
*
* Z<>T exchange the HP41 registers, tested July 11 2024
       WORD 'Z<>T'
       P=     0
       LC(5)  OZ             put Z-address into field A of register C
*                               low order 5 nibbles C(A)
       CD0EX                 exchange data pointer address D0 with C(A)
       R1=C                  save D0 into R1
       C=DAT0 W              C = value of Z from its address in C(A)
       D0=D0+ 16             D0 show now towards T
       A=DAT0 W              put value of T (from address D0) into A
       DAT0=C W              T = value of Z
       D0=D0- 16             D0 -> Z
       DAT0=A W              Z = value of T
       C=R1
       D0=C                  restore D0
       RTNCC
*
* STO- substract X value in the reg address, no lastX, tested 13 07 2024
*      use: FVARNAME1 STO- will substract the X value within FVARNAME1
       WORD 'STO-'           
       GOSBVL CHS            change sign of X for later calc
       GOSBVL SAVEFP
*
       C=DAT1 A              copy data at address in D1 into C(A) = field A of reg C
*                            D1 is the data pointer
       CD0EX                 exchange C(A) with D0 (the instruction pointer)
*                             for now reading the values
       A=DAT0 W              copy data at address in D0 (in C(A)) into W in A
       R0=A                  R0: value of data at address for later
*
       P=     0
       LC(5)  OX             load of X register addr into C(A)
       CD0EX                 exchange C(A) with D0 (the instruction pointer)
       A=DAT0 W              copy data of X into A
       CD0EX                 exchange C(A) with D0 (the instruction pointer)
       C=A    W              (-XValue) into (C)
       A=R0                  (RegValue) into (A)
       GOSBVL SPLTAC         (A) in (A,B) and (C) in (C,D)
       GOSBVL AD2-15         (A,B) + (C,D) and result in (A,B) = RegVal -X
       GOSBVL RES12          (A,B) into (C)
       A=C    W              put C into A
* now like in STO word
       C=DAT1 A              copy data at address in D1 into C(A)
       CD0EX                 exchange C(A) with D0 (the instruction pointer)
       DAT0=A W              Write value (OrgRegVal -X) to reg back
       D0=C
       GOSBVL GETFP
       GOSBVL CHS            change back from -X to X
       D1=D1+ 5              return nothing on data stack
       RTNCC
*
* RCL* upload register value, put X into LastX, multipl reg val with X value, 
* upload result into X
       WORD 'RCL*'
       GOSBVL NUMST          X into A,B and X into LastX, SAVEFP
       R0=A
       A=B    W
       R1=A                  X= (A,B) -> (R0,R1)
       C=DAT1 A
       CD0EX
       A=DAT0 W
       GOSBVL SPLITA
       C=B    W
       D=C    W
       C=A    W
       A=R1
       B=A    W
       A=R0
       GOSBVL MP2-15
       GOSBVL PUTABX
       D1=D1+ 5
       RTNCC
*
* RCL- RCL+ RCL/ STO* STO+ ST2* STO/ STO^ coming see total recall HP41 module
* math functions agm magm fibon iterated coming
       END

Forth word for a formatted stack output:
Code:
: FSTA. RUP ." T: " F. RUP CR ." Z: " F. RUP CR ." Y: " F. 
RUP CR ." X: " F. CR X<>L ." L: " F. X<>L CR ;


I am struggling with the RCL* (the others works).

1.0 2.0 3.0 4.0 FVARIABLE TBX TBX 7.0 STO X<>Y FSTA.
T: 2
Z: 3
Y: 7
X: 4
L: 4
OK { 0 }

TBX RCL*
OK { 0 }
FSTA.
T: 2
Z: 3
Y: 7
X: -2.94024001018E303 should show 28 and not -2.94
L: 4
OK { 0 }


Any idea is welcome how to solve this (having the correct result.. MP2-15 seems a bit weird how to make it working).

UPDATE: the now working word is in the posts below.
All listed routines in the words are entry points which must be defined. Here the list which has to be included into the word file before you start the command in the forth prompt >> " NEWWORDFILE" ASSEMBLE << (I will try to keep it updated; if any issue, let me know via PM).

Code:
* System entry points: see 14-1 of IMS Vol 1
=UMODES EQU #0BDB1            set the modes
=ARGERR EQU #0BF19            for report invalid arg error
=PI     EQU #0C000            PI 12digit form (LCHEX) 
=SUBONE EQU #0C327            substract 1 to X (A,B) page 1392 of idsv3
=ADDONE EQU #0C330            add 1 to X = (A,B) (AD15S..)
=IN2-15 EQU #0C33E            1/X where X=(A,B)
=X/Y15  EQU #0C34F            X/Y where X=(A,B) and Y=(C,D)
=AD2-12 EQU #0C35F            12 digit add = (A) + (C)
=AD2-15 EQU #0C363            15-digit add = (A,B) + (C,D) 
=AD15S  EQU #0C369            same + SB reset page 1394 of idsv3
=MP2-12 EQU #0C432            12 digit * (A) * (C)
=MP1-12 EQU #0C436            12 digit * (A,B) * (C)
=MP2-15 EQU #0C43A            15-digit multiply (A,B) * (C,D)
=MP15S  EQU #0C440            15-digit multiply (A,B) * (C,D)
=MULTF  EQU #0C446            ?? Multiply float
*
=DV2-12 EQU #0C4A8            12-digit divise
=DV2-15 EQU #0C4AC            15-digit divise
=DV15S  EQU #0C4B2            15-digit divise SB not cleared
*
=SPLITA EQU #0C6BF            Extend (A) into (A,B)
=CLRFRC EQU #0C6F4            (A,B) to (A,B) w/o fractio part page 1409
=SPLTAC EQU #0C934            Extend (A) and (C) into (A,B) and (C,D)
=SPLITC EQU #0C940            Extend (C) into (C,D)
=uRES12 EQU #0C994            Reduce (A,B) into (C)
=NRM12  EQU #0C9BB            ?? Round to 12 sig digits
*
=YX2-12 EQU #0D274            Y^X & Reg 0 2 3 modified
=STAB1  EQU #0D3D9            Store AB into scratch1 (R0,R1)
=EXAB1  EQU #0D3E7            Exch AB and scratch1
=RCCD1  EQU #0D3F1            Put scratch into CD
=STAB2  EQU #0D400            Store AB into scratch2 (R2,R3)
=EXAB2  EQU #0D40E            Exch AB and scratch2
=RCCD2  EQU #0D41C            Put scratch2 into CD
=STCD2  EQU #0D427            Store AB into scratch2 (R2,R3)
=uTEST  EQU #0D435            User real comparison Page 1484..6
*
=TST15  EQU #0D47A            Compare numbers 15dg AB vs CD
* P has the cell# assoClated width the nUMber pair, arg's in 15-dig forM unchanged.
* page 1486 of idsv3
*
=MAKEPI EQU #0D6F1            Put PI into (C,D)
=TWO*   EQU #0DB38            Dbl precision doubler
=PI/2   EQU #0DB77            load PI/2 into (C,D)
*
=SB15S  EQU #0E19A            substraction 15 digits (A,B) = (A,B) - (C,D) . needs SETDEC before
=DMP15S EQU #0E1B3            SETDEC then MP15S
=RESD1  EQU #0E1EE            like RES12, dont alter D1
=SPLTAX EQU #0E62B            SETDEC, Extend (A) into (A,B) Page 1585
=SIGTST EQU #0E636            Handle signal NaN Page 1585 
=BP     EQU #0EADF            make beep float A HZ Float C duration sec
*
=POP1R  EQU #0E8FD            RTN of POP1N #0BD1C Seite 1361
*                             take 1 arg off mathstack
*
=STSCR  EQU #0E92C            Push (A,B) into top math scratch stack page 1607
*
=RCLW1  EQU #0E981            recall 1 top math stack entry page 1610
* move (AB) to (CD) then recal into (AB)
*
=FNRTN4 EQU #0F238            function return, page 1679
=FLOAT  EQU #1B322            change integ to 12dig float in A
*
=MTHSTK EQU #2F599            data stack
*
=FUNCD0 EQU #2F8BB            function scratch RAM allocation 5 nibbles
*                             see FUNCD1 FUNCR0..R1 too page 3089
*
=OL     EQU #2FBC0            L address
=OX     EQU #2FBD0            X address
=OY     EQU #2FBE0            Y address
=OZ     EQU #2FBF0            Z address
=OT     EQU #2FC00            T address
*
=FEND   EQU #E08E9            PUTABX,GETFP
=CHS    EQU #E1518            change X sign; dont change LastX
=NUMST  EQU #E1718            GET X INTO (A,B); L = X
=MOD    EQU #E1718            modulo
*
=OVER   EQU #E2538            (n1 n2 -- n1 n2 n1)
=SAVEFP EQU #E717A            save Forth pointer
=GETFP  EQU #E71A5            restore Forth pointers
=PUTABX EQU #E72F5            Put (A,B) into X, .. GETFP
=GETX   EQU #E728A            Put X into (A,B) 
=GETX+L EQU #E72DF            Put X into (A,B) and X in L

HP71B 4TH/ASM/Multimod, HP41CV/X/Y & Nov64d, PILBOX, HP-IL 821.62A & 64A & 66A, Deb11 64b-PC & PI2 3 4 w/ ILPER, VIDEO80, V41 & EMU71, DM41X
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07-16-2024, 06:05 AM
Post: #2
RE: (HP71B) ASM question
Hi,

Had a quick look, but I'm missing the IDS so I can't verify.
But, in general it looks ok, don't see any real problem with the code, but could it be that SPLITA uses R0 or R1?

The result is way off (not only -2.94 but -2.94*10^303) which indicates that there is rubbish in to the MP2-15 routine.

Shouldn't be (C,D) since that is the result from SPLITA, so my guess is that (A,B) is wrong (which comes from (R0,R1)), and if (I mean if since I don't have the code) SPLITA uses R0 or R1 this might cause the problem.

Just my 2 cents ...

Cheers,
Thomas

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07-16-2024, 07:00 AM
Post: #3
RE: (HP71B) ASM question
One way to be sure, is to update the code and verify the result.

Comment out the following line, should result in the X value untouched:

Code:
       GOSBVL SPLITA
       C=B    W
       D=C    W
       C=A    W
       A=R1
       B=A    W
       A=R0
*       GOSBVL MP2-15
       GOSBVL PUTABX
       D1=D1+ 5
       RTNCC

1.0 2.0 3.0 4.0 FVARIABLE TBX TBX 7.0 STO X<>Y FSTA.
T: 2
Z: 3
Y: 7
X: 4
L: 4
OK { 0 }
TBX RCL*
OK { 0 }
FSTA.
T: 2
Z: 3
Y: 7
X: 4 <-- Should be 4 after this
L: 4
OK { 0 }

Comment out the following lines, should result in the value of TBX in X:

Code:
       GOSBVL SPLITA
*       C=B    W
*       D=C    W
*       C=A    W
*       A=R1
*       B=A    W
*       A=R0
*       GOSBVL MP2-15
       GOSBVL PUTABX
       D1=D1+ 5
       RTNCC

1.0 2.0 3.0 4.0 FVARIABLE TBX TBX 7.0 STO X<>Y FSTA.
T: 2
Z: 3
Y: 7
X: 4
L: 4
OK { 0 }
TBX RCL*
OK { 0 }
FSTA.
T: 2
Z: 3
Y: 7
X: 7 <-- Should be 7 after this
L: 4
OK { 0 }

[35/45/55/65/67/97/80 21/25/29C 31E/32E/33E|C/34C/38E 41C|CV|CX 71B 10C/11C/12C/15C|CE/16C 32S|SII/42S 28C|S 48GX/49G/50G 35S 41X]
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07-16-2024, 07:22 AM (This post was last modified: 07-16-2024 04:03 PM by floppy.)
Post: #4
RE: (HP71B) ASM question
(07-16-2024 06:05 AM)ThomasF Wrote:  Hi,

Had a quick look, but I'm missing the IDS so I can't verify.
But, in general it looks ok, don't see any real problem with the code, but could it be that SPLITA uses R0 or R1?

The result is way off (not only -2.94 but -2.94*10^303) which indicates that there is rubbish in to the MP2-15 routine.

Shouldn't be (C,D) since that is the result from SPLITA, so my guess is that (A,B) is wrong (which comes from (R0,R1)), and if (I mean if since I don't have the code) SPLITA uses R0 or R1 this might cause the problem.

Just my 2 cents ...

Cheers,
Thomas
Thanks for the feedback. I used SPLITA and used the others SPLITC or SPLTAC too with the same weird result.

Code:
WORD 'RCL*'
       GOSBVL NUMST          X into A,B and X into LastX, SAVEFP
       C=DAT1 A              copy data at address in D1 into C(A) = field A of reg C
       CD0EX                 exchange A field of reg C (= D1 pointer) with data pointer D0
       C=DAT0 W              C = recalled value in register
       GOSBVL SPLITC         (C) in (C,D)
       GOSBVL MP2-15         (A,B) * (C,D) = and result in (A,B)
       GOSBVL PUTABX
       D1=D1+ 5              throw away address
       RTNCC

In EMU71. If there is a difference in HP71B? (dont know for now. I have to test this).
Could not read any R0 or R1 impact in IDS Vol3. However, I will have a deeper look into this the next hours.
How to use the debugger in EMU71? (no glue how to use a debugger). A short WebEx with anybody could be great.

With the X*2 word, I had already a problem with MP2-15 when I had X multiply 2, which gave the wrong result. Its why I changed it to X + X.

When we see the Forth/ASM IMS for the words X^2 (no stack change like RCL* but with 2 same parameters A-B * C-D which in fact A-B * A-B) or F* (Stack drop) , it uses MP2-15.
I am still looking there what is the difference to the code of the RCL* word (no stack drop, A#C and B#D).

Update: I will have a look to the path DV2-15 of 1/X15.. = multiply. Will see if its better on EMU71.

HP71B 4TH/ASM/Multimod, HP41CV/X/Y & Nov64d, PILBOX, HP-IL 821.62A & 64A & 66A, Deb11 64b-PC & PI2 3 4 w/ ILPER, VIDEO80, V41 & EMU71, DM41X
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07-16-2024, 12:07 PM
Post: #5
RE: (HP71B) ASM question
(07-16-2024 07:22 AM)floppy Wrote:  In EMU71. If there is a difference in HP71B? (dont know for now. I have to test this).
Could not read any R0 or R1 impact in IDS Vol3. However, I will have a deeper look into this the next hours.
How to use the debugger in EMU71? (no glue how to use a debugger). A short WebEx with anybody could be great.

EMU71 and a 71B should act the same, but this theoretically could vary if your 71B device has a different ROM version than the 2CDCC used by EMU71 (check with VER$ command).

EMU71's debugger is explained in the DEBUGGER.TXT file that comes as part of the EMU71 installation (found in the folder you installed EMU71 into).

--Bob Prosperi
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07-23-2024, 05:54 PM (This post was last modified: 07-23-2024 06:12 PM by floppy.)
Post: #6
RE: (HP71B) ASM question
It was not easy peasy to read the IDS. There are not a lot of float routines examples. the use of RESD1 instead of RES12 and few SETDEC was making it.

Now I have a working code

Code:
       WORD 'RC*'
       GOSBVL SAVEFP
*
       C=DAT1 A
       CD0EX
       R1=C                  save D0 for restoration later
       A=DAT0 W
       R0=A                  RegVal into R0
*
       P=     0
       LC(5)  OX
       CD0EX
       A=DAT0 W
       D0=D0- 16
       DAT0=A W              X into L, A=X
*      
       B=A    W
       C=B    W 
       A=R0                  A=Regval, C=X
       GOSBVL SPLTAC
       SETDEC
       GOSBVL MP2-15
       SETHEX
       GOSBVL RESD1
       A=C    W              A = Result
*
       D0=(5) OX
       DAT0=A W              Result into X
*
       GOSBVL GETFP
       D1=D1+ 5
       RTNCC

New words like the HP41 Warpcore are on the way RC* RC+ RC/ ST+ ST- & .. more to come. Will be placed into github when more are available (ST* ST/ ?0= ?X= ..).
All Forth words. Mostly for float algebra (like HP41).

HP71B 4TH/ASM/Multimod, HP41CV/X/Y & Nov64d, PILBOX, HP-IL 821.62A & 64A & 66A, Deb11 64b-PC & PI2 3 4 w/ ILPER, VIDEO80, V41 & EMU71, DM41X
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07-23-2024, 06:10 PM
Post: #7
RE: (HP71B) ASM question
(07-23-2024 05:54 PM)floppy Wrote:  It was not easy peasy to read the IDS...

This is the understatement of the month!! Although reading foreign code, and especially for an unknown assembly language, can be time-consuming, difficult and frustrating, I have found the 71B IDS to be even harder than most on the several attempts I made in the past. No doubt mostly because I never knew the NUT instruction family, but also because I had only used 6800 and PDP-11 assembly languages at the time, and the HP NUT and Saturn could not be more different. The tight code space, layered use of 'library' calls, wacky different sizes of registers and nibble orientation also all contributed to a series of aborted attempts to gain any general understanding. Good for you floppy for sticking with it to make enough progress here, well done!

--Bob Prosperi
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07-29-2024, 09:25 AM (This post was last modified: 07-29-2024 10:06 AM by floppy.)
Post: #8
RE: (HP71B) ASM question
(07-23-2024 06:10 PM)rprosperi Wrote:  
(07-23-2024 05:54 PM)floppy Wrote:  It was not easy peasy to read the IDS...

This is the understatement of the month!! Although reading foreign code, and especially for an unknown assembly language, can be time-consuming, difficult and frustrating, I have found the 71B IDS to be even harder than most on the several attempts I made in the past. No doubt mostly because I never knew the NUT instruction family, but also because I had only used 6800 and PDP-11 assembly languages at the time, and the HP NUT and Saturn could not be more different. The tight code space, layered use of 'library' calls, wacky different sizes of registers and nibble orientation also all contributed to a series of aborted attempts to gain any general understanding. Good for you floppy for sticking with it to make enough progress here, well done!

So, now, how to reduce the Saturn ASM pains?..
Perhaps reading this ? (not HP71B, HP48, but the nice explanations can be overtaken because thats the same processor) https://www.keesvandersanden.nl/calculat...torial.pdf
It explained to me what I saw by looking at the IDS prints therefore I think is a great help. If there are any other help around (like this manual I have to read during my upcoming holiday)?

Just to reduce the traumatic experience.. here a FORTH word which allow any data exchange between variables and which is perhaps usefull for you.

X L <F>
will for example act like X<>L .
Can be used in any combination X<>Z Z<>L .. (X<>Y exists in FORTH, so no need to use the X Y <F>)

Code:
* <F> exchange the values of the 2 float variables
* use: FVAR1 FVAR2 <F> 
       WORD '<F>'
       GOSBVL SAVEFP         save pointers: CPU reg, D0, D1
       C=DAT1 A              copy data at 1st address in D1 into C(A)
       CD0EX                 exchange C(A) with D0
       A=DAT0 W              value into A
       R0=A                  R0 = Value1
       D1=D1+ 5
       C=DAT1 A              copy data at 2nd address in D1 into C(A)
       CD0EX
       A=DAT0 W
       R1=A                  R1 = value2
       A=R0
       DAT0=A W              Store value1 at addr2
       D1=D1- 5
       C=DAT1 A
       CD0EX
       A=R1
       DAT0=A W              Store value2 at addr1
       GOSBVL GETFP          restore pointers: CPU reg, D0, D1
       D1=D1+ 10             return nothing on data stack
       RTNCC

Then the next question would be: what assembler is similar to the saturn?
Rosetta list few ASM versions https://rosettacode.org/wiki/Category:Assembly
and if an ASM is not so far away from the Saturn, then something could be perhaps overtaken from there.

HP71B 4TH/ASM/Multimod, HP41CV/X/Y & Nov64d, PILBOX, HP-IL 821.62A & 64A & 66A, Deb11 64b-PC & PI2 3 4 w/ ILPER, VIDEO80, V41 & EMU71, DM41X
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07-30-2024, 06:47 AM
Post: #9
RE: (HP71B) ASM question
(07-29-2024 09:25 AM)floppy Wrote:  Then the next question would be: what assembler is similar to the saturn?
Rosetta list few ASM versions https://rosettacode.org/wiki/Category:Assembly
and if an ASM is not so far away from the Saturn, then something could be perhaps overtaken from there.

Do you mean what assembler has similar syntax and pseudo-ops to those used for Saturn? AFAIK, HP's own SASM is the only published assembler that is fully compatible with the 71B IDS listings.

Or do you mean what other processor has a machine language like Saturn? The answer to that is none whatsoever, though the closest would be the Nut processor as used in the 41C/CV/CX, 10C, 11C, 12C, 15C, and 16C, and which is even more painful to program than Saturn. And that, of course, was derived from the Woodstock architecture,(HP-25, HP-67, etc.), which was derived from the classic architecture (HP-35, -45, -46, -55, -67, -70, -80, -81).

If you want to go back even further, the HP classic archtiecture was inspired by the Fairchild PPS 25 architecture, which is even more obscure than any of the HP architectures. Whatever assembler(s) existed for the PPS 25 is lost to the mists of time.

Prior to the HP 49g+, introduced in 2003, HP used custom processor architectures in all of their calculators, with the lone exception of the HP 9815, which used a Motorola MC6800.

For comparison, traditional TI calculators variously used one of two architecture families, "digit" architecture (similar to TMS1000 microcontroller), and "register" architecture, sort of vaguely like the HP classic/Woodstock/Nut archtiectures. However, like the Fairchild PPS 25, they are even more obscure than the HP architectures, and I'm not aware of any assembler for them.

In summary, if you want to program HP's Saturn-based products (or Saturn-emulating products) in assembly, you're basically stuck with dealing with the bizarre architecture. (Some of us weirdos actually like it, challenging though it is.)
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07-30-2024, 06:51 AM
Post: #10
RE: (HP71B) ASM question
I forgot to mention, a C compiler actually exists for the HP Nut architecture:

https://www.calypsi.cc/

It's not open-source, but the binary build targeting Nut is available free-of-charge.

I have not tried it.

It won't help you with Saturn, though. In principle, if one had the source code (whcih unfortunately is not available), one might consider trying to retarget it to Saturn, since in many regards the architectures are similar.
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07-30-2024, 07:28 AM
Post: #11
RE: (HP71B) ASM question
(07-29-2024 09:25 AM)floppy Wrote:  So, now, how to reduce the Saturn ASM pains?..

RPL was initially developed for the exact purpose: make the calculator development much easier and faster.
It was developed for the HP-71B successors and was first used for the 18C.
Then RPL was exposed to the user on the 28C, and the internal RPL was renamed "System-RPL".

Another well-known example of RPL used for internal system programming and not exposed to the user is the HP-42S.
However, using RPL for system programming has a cost: a significant loss of performance.
For instance, the HP-32S written in pure assembly is faster than the 42S, despite a slower CPU.

For the HP-71B, FORTH is in a similar position: simpler programming, but not as fast as pure assembly.
You may rewrite your <F> word in FORTH to evaluate the benefit ease-of-programming/performance.

J-F
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07-30-2024, 07:54 AM (This post was last modified: 07-30-2024 08:13 AM by J-F Garnier.)
Post: #12
RE: (HP71B) ASM question
(07-30-2024 06:47 AM)brouhaha Wrote:  ... the Nut processor as used in the 41C/CV/CX, 10C, 11C, 12C, 15C, and 16C, [...] was derived from the Woodstock architecture,(HP-25, HP-67, etc.), which was derived from the classic architecture (HP-35, -45, -46, -55, -67, -70, -80, -81).

If you want to go back even further, the HP classic archtiecture was inspired by the Fairchild PPS 25 architecture, which is even more obscure than any of the HP architectures. Whatever assembler(s) existed for the PPS 25 is lost to the mists of time.

I didn't know the connection to the Fairchild PPS 25.

Do you know where the Capricorn CPU architecture, used in the Series 80 and the 75C, comes from?
It has some loose connections with the calculator architecture with its capability to handle a whole 64-bit register operation in one opcode, but has many distinctive capabilities and is less calculator-oriented with no dedicated register fields but a flexible 'multi-byte' mode.
I never found anything close. Did HP develop it from scratch ?


(07-30-2024 06:51 AM)brouhaha Wrote:  I forgot to mention, a C compiler actually exists for the HP Nut architecture:
https://www.calypsi.cc/
It's not open-source, but the binary build targeting Nut is available free-of-charge.

I remember there were attempts to write a C-compiler for the HP-71B.
None never became usable, but a tentative is still described here:
github.com/hp71b/fnc

J-F
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08-03-2024, 04:47 PM
Post: #13
RE: (HP71B) ASM question
Information: in order to make your HP71B with MULTIMOD and Forth/ASM in it, acting like an HP41 with RPN on steroid, herewith few words.

Code:
* CLX : set X to zero. LastX not modified (see HP41)
       WORD 'CLX'
       GOSBVL =SAVEFP
       P=     0
       LC(5)  OX       
       CD0EX                 
       A=0    W
       DAT0=A W
       D0=C
       GOSBVL =GETFP
       RTNCC

Code:
* CLST : set X Y Z T to zero. LastX not modified (see HP41).
       WORD 'CLST'
       GOSBVL =SAVEFP
       P=     0
       LC(5)  =OX
       CD0EX
       A=0    W
       DAT0=A W              X set to zero
       D0=D0+ 16
       DAT0=A W              Y set to zero
       D0=D0+ 16
       DAT0=A W              Z set to zero
       D0=D0+ 16
       DAT0=A W              T set to zero
       GOSBVL =GETFP
       RTNCC

Code:
* DEG-RAD : Deg to Rad conversion (D-R in HP41)
* Result in X is   X(old) * (PI/2) / (2* 45)
* X(old) go into LastX
       WORD 'DEG-RAD'            
       GOSBVL =NUMST      
       GOSBVL =PI/2
       SETDEC
       GOSBVL =MP2-15  
       SETHEX
       C=0    W
       D=C    W
       P=     0
       C=C+1  P         
       P=     14
       D=D+1  P              
       D=D+1  P
       D=D+D  P
       D=D+D  P
       D=D+1  P      
       SETDEC
       GOSBVL =DV2-15   
       SETHEX
       GOSBVL =PUTABX
       RTNCC

Code:
* RAD-DEG : Rad to Deg conversion (R-D in HP41)
* Result in X is    X(old) * (2* 45) / (PI/2)
* X(old) go into LastX
       WORD 'RAD-DEG'
       GOSBVL =NUMST  
       C=0    W
       D=C    W
       P=     0
       C=C+1  P   
       P=     14
       D=D+1  P
       D=D+1  P
       D=D+D  P
       D=D+D  P
       D=D+1  P      
       SETDEC
       GOSBVL =MP2-15   
       SETHEX
       GOSBVL =PI/2
       SETDEC
       GOSBVL =DV2-15    
       SETHEX
       GOSBVL =PUTABX
       RTNCC

HP71B 4TH/ASM/Multimod, HP41CV/X/Y & Nov64d, PILBOX, HP-IL 821.62A & 64A & 66A, Deb11 64b-PC & PI2 3 4 w/ ILPER, VIDEO80, V41 & EMU71, DM41X
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08-03-2024, 05:06 PM
Post: #14
RE: (HP71B) ASM question
(08-03-2024 04:47 PM)floppy Wrote:  Information: in order to make your HP71B with MULTIMOD and Forth/ASM in it, acting like an HP41 with RPN on steroid, herewith few words.

[snip]

Very nice! Both useful as they are, but also good examples for folks learning to dabble in 71B Forth.

For readers that may not have been following floppy's explorations, these are new FORTH words acting on the floating point 'stack'.

--Bob Prosperi
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08-03-2024, 05:40 PM (This post was last modified: 08-03-2024 05:55 PM by floppy.)
Post: #15
RE: (HP71B) ASM question
The HP41 freaks will enjoy? perhaps.. lets throw more to these persons.. (not sure it exist anywhere else. could not find anything like that except perhaps in an HP41Forth-Module-translator where I did not had a look at the code, but hereunder is for use with the standard Forth/ASM module)

Code:
* %CH : calculate [(x —-y) 100] / y, see %CH HP41 manual page 84
* tested 02 Aug 2024
       WORD '%CH'
       GOSBVL =SAVEFP
       P=     0
       LC(5)  =OX
       CD0EX
       A=DAT0 W
       D0=D0- 16
       DAT0=A W              X into L, A=X
       R0=A
*
       P=     0
       LC(5)  =OY
       CD0EX
       A=DAT0 W              A = Y
       SETDEC
       A=-A-1 S              A = -Y
       SETHEX
*       
       B=A    W
       C=B    W 
       A=R0                  A=X, C=-Y
*       
       SETDEC
       GOSBVL =AD2-12        (X-Y) in (A,B)
       SETHEX
       C=0    W
       D=C    W
       P=     0
       C=C+1  P              
       C=C+1  P              Exponent 10**2
       P=     14
       D=D+1  P              1 in D mantissa.. = 100 in (C,D)
*       
       SETDEC
       GOSBVL =MP2-15        Resut in A,B
       SETHEX
       GOSBVL =EXAB1         [(x —-y) 100] into (R0,R1)
*       
       P=     0
       LC(5)  =OY
       CD0EX
       A=DAT0 W              A = Y
       GOSBVL =SPLTAX         (A,B) = Y
       C=B    W
       D=C    W
       C=A    W              (C,D) = Y
       GOSBVL =EXAB1         (A,B) now = [(x —-y) 100]
       SETDEC
       GOSBVL =DV2-15        (A,B) = [(x —-y) 100] / Y
       GOSBVL =RESD1
       SETHEX
       A=C    W              A = Result
*
       D0=(5) =OX
       DAT0=A W              Result into X
       GOSBVL =GETFP
       RTNCC

Code:
* %OF : calculate (X*Y)/100, see % in HP41 manual page 83, =pdf 89
* use: 500.0 94.0 %OF  result 470.00 in X, 94 in LASTX
* tested 02 Aug 2024
       WORD '%OF'
       GOSBVL =SAVEFP
       P=     0
       LC(5)  =OX
       CD0EX
       A=DAT0 W
       D0=D0- 16
       DAT0=A W              X into L, A=X
       R0=A
*
       P=     0
       LC(5)  =OY
       CD0EX
       A=DAT0 W              A = Y
*       
       B=A    W
       C=B    W 
       A=R0                  A=X, C=Y
*
       SETDEC
       GOSBVL =MP2-12         (X*Y) in (A,B)
       SETHEX
* reduce exponent nb by 2 for divide by 100? not tested..
       C=0    W
       D=C    W
       P=     0
       C=C+1  P              
       C=C+1  P              Exponent 10**2
       P=     14
       D=D+1  P              1 in D mantissa.. = 100 in (C,D)
*
       SETDEC
       GOSBVL =DV2-15         Result in A,B
       GOSBVL =RESD1
       SETHEX
       A=C    W              A = Result
*
       D0=(5) =OX
       DAT0=A W              Result into X
*
       GOSBVL =GETFP
       RTNCC

UPDATE UPDATE I forgot the entry points (= existing routines which are listed in the IDS V2 or V3 and must be part of an ASM file for it to be assembled). I posted the list in the all first post.

HP71B 4TH/ASM/Multimod, HP41CV/X/Y & Nov64d, PILBOX, HP-IL 821.62A & 64A & 66A, Deb11 64b-PC & PI2 3 4 w/ ILPER, VIDEO80, V41 & EMU71, DM41X
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08-03-2024, 10:56 PM
Post: #16
RE: (HP71B) ASM question
(07-30-2024 07:54 AM)J-F Garnier Wrote:  Do you know where the Capricorn CPU architecture, used in the Series 80 and the 75C, comes from?
It has some loose connections with the calculator architecture with its capability to handle a whole 64-bit register operation in one opcode, but has many distinctive capabilities and is less calculator-oriented with no dedicated register fields but a flexible 'multi-byte' mode.
I never found anything close. Did HP develop it from scratch ?


J-F

Check out the August 1980 HP Journal:
"A Custom LSI Approach to a personal computer"
I think "Custom" tells you what you need to know. 8^)
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08-04-2024, 11:45 AM
Post: #17
RE: (HP71B) ASM question
Lets make it weird ;-)

an HP71 beeping like an HP41?..
Forth Word by using the Forth/ASM module (as HW or within the MULTIMOD).

Code:
* BEEP41  the HP41 beep sound on HP71B
* https://www.hpcalc.org/details/7826 
* .. The 41's BEEP is TONE 7, TONE 5, TONE 8, TONE 7
* According to the Wickes book on synthetic programming the frequencies are as follows:
* TONE 7 = 629 Hz
* TONE 5 = 394 Hz
* TONE 8 = 788 Hz
* TONE 7 = 629 Hz
* The book also says that the duration of the standard tones is 0,28 seconds.
       WORD 'BEEP41'
       GOSBVL =SAVEFP
       C=0    W
* Tone 7
       LCHEX  629000000000002
       A=C    W
       R0=C
       LCHEX  280000000000999
       R1=C
       GOSBVL =BP
* Tone 5
       LCHEX  394000000000002
       A=C    W
       C=R1
       GOSBVL =BP
* Tone 8
       LCHEX  788000000000002
       A=C    W
       C=R1
       GOSBVL =BP
* Tone 7
       A=R0
       C=R1
       GOSBVL =BP
*
       GOSBVL =GETFP
       RTNCC

HP71B 4TH/ASM/Multimod, HP41CV/X/Y & Nov64d, PILBOX, HP-IL 821.62A & 64A & 66A, Deb11 64b-PC & PI2 3 4 w/ ILPER, VIDEO80, V41 & EMU71, DM41X
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08-05-2024, 04:21 AM
Post: #18
RE: (HP71B) ASM question
(07-30-2024 07:54 AM)J-F Garnier Wrote:  I didn't know the connection to the Fairchild PPS 25.

See my comment in the HP 9199A thread, and Steve Simkin's reply.

Quote:Do you know where the Capricorn CPU architecture, used in the Series 80 and the 75C, comes from?

The HP Journal article KeithB mentioned explains their rationale for designing a custom architecture, namely BCD arithmetic and variable length data. It is unclear that any specific architecture(s) influenced it, other than the generalized influence of the BCD and variable length word of the calculator processors.

The earlier Fairchild F8 architecture (also used by Mostek 3870) was AFAIK the earliest microprocessor architecture to have 64 registers, but it doesn't really appear that it had a significant influence.
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08-05-2024, 09:04 AM
Post: #19
RE: (HP71B) ASM question (Notebook...)
I know this is NOT exactly belonging here with FLOPPYs very cool work - but...

I have taken the "Notebook" from John G. and made it into a compressed single PPDF - 15mb and AFAICT lossless, a lot less than the single page scans which I obviously used

I am amazed that I missed this last year - very cool reading!!

I don't have a place to put a 15Mb file for y'all to read/get - any advice on how I can get around this, please let me know.
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08-05-2024, 11:50 AM
Post: #20
RE: (HP71B) ASM question
(08-05-2024 09:04 AM)KimH Wrote:  I don't have a place to put a 15Mb file for y'all to read/get - any advice on how I can get around this, please let me know.

Assuming you mean how to share a large file here in the MohPc Forum, the simplest thing is to post the file on a OneDrive, GDrive or DropBox account (they're all free up to several GB), then share it and include the link in your post here. The first time through this can be confusing, but in the end it's pretty easy, useful and free!

--Bob Prosperi
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