• FPGA Hobby Board: I used the Papilio FPGA Platform - specifically a Papilio One 250K development board. This board uses has a Xilinx Spartan 3E FPGA chip (a XC3S250E) - not the biggest FPGA but its inexpensive and has plenty of resources for this project.
• 16 Digit Seven Segment LED Display: This display uses a Titan Micro TM1640 IC. I bought mine from DealExtreme but do a Google search for "TM1640 LED Board" and you will find many suppliers. This is a great display board for a DIY calculator but it is not pocket-calculator-size -- more like desktop-calculator-size. It has a simple to use I2C like interface.
• PS/2 Keyboard: You know, the standard PC keyboards before USB versions took over.
  

• The FPGA Classic HP Core I designed is functional the same as the original calculators (I hope). The FPGA Classic HP Core directly executes the 10-bit op-codes of the original calculators. Do not confuse this with emulating the op-codes (like what the many SW emulators do) -- there is no embedded CPU (i.e. ARM, AVR, MicroBlaze,...) in the design -- there is no SW program running to interpret the HP 10-bit op-codes.
• I know of the 41CL project (and the 41CL is a real project compared to the "toy" I created). I did not use 41CL design code is a reference -- I wanted the "fun" of designing on my own. Anyway the 41CL project is done in Verilog -- I only speak VHDL.
  

• Functionally equivalent to the original HP Calculator "CPU". This means it will execute the original, unchanged, ROM images of the HP-35, HP-45, HP-55,...
• Not timing equivalent to the original HP Calculator "CPU". This means it does not execute the 10-bit opcodes in the same time as the original calculators. The FCHPC executes each op-code in far fewer clock cycles. (Plus, in a modern FPGA the FCHPC can run at much higher clock rates then the original calculators.)
• Written in VHDL and tested in a Xilinx Spartan 3 FPGA. Targeting other FPGAs should not be an issue. I avoided using Xilinx FPGA specific features and using Xilinx's CoreGen tool -- logic is inferred from VHDL as much as possible. (Warning: That last statement requires some knowledge of FPGA designing; don't worry if it made no sense to you.)
  

• LED Display driver: Converts the FCHPC current X value into a displayable form. This is different than the original calculator which had to drive the segments of its LED display directly. I used a I2C LED display. The FCHPC has two output ports: the X register (internal to the FCHPC, this is the A register) and the mask register (internally, this is the B register). Using the X and mask registers, the formated LED display output is created.
• Keyboard Interface: Converts PS/2 serial keyboard scan codes to HP keypad scan codes. This conversion is different for each type of HP calculator.
• Internal clock generation: Creates the clock that all FPGA logic will use. In this design it is a multiple of 7MHz (currently 28MHz). The reason for 7MHz is its easy to derive a throttling signal for the FCHPC to slow the op-code execution to match a real HP-55. This allows the HP-55's timer mode to be accurate.
• Two speed modes are available: 1) real mode - the FCHPC executes op-codes at the same rate as an HP-55 and 2) turbo mode - the FCHPC executes op-codes at full speed. The speed of the turbo mode depends on the internal FPGA clock. Currently, at 28MHz, turbo mode is about 1600 times faster than the original HP-55! The speed mode is selected by special keys on the PS/2 keyboard.
• There are some extra display features supported that did not exist on the original calculators:
  • Indicators for the shift keys. For example, a "F" or "G" is displayed on the far right of the LED display for the HP-55 version when a shift is active.
  • Indicator for the speed mode. This shown in the far right decimal point.
  • Instead of a flashing display for an error condition, the message "-- Error --" is displayed (non-flashing). The original flashing display for an error could not be used in the FPGA version. The flashing was done in the calculator's micro-code (i.e. a SW delay loop). In turbo mode, the flashing would be too fast to see!
    

(03-29-2014 08:52 PM)bkn42 Wrote:  Over in this thread I mentioned a FPGA design I did which implemented a Classic HP calculator's (HP-35, HP-45, HP55,...) hardware. I promised in the thread I'll explain my design in more detail in this forum. So, here is an introduction to my FPGA project:
.....
I now realize I'm a better digital designer than a tech writer; so, I hope this post was not too disjointed or rambling.

Brian

(03-31-2014 07:15 AM)eried Wrote:  So cool! Do you recommend papillo to learn fpga? What IDE do you use to code?

(03-29-2014 08:52 PM)bkn42 Wrote:  Here is a picture of the setup:

Sorry, its not the best picture; I'll try and get better pictures soon. (I hope the picture shows up in the post -- it does not show in the preview.)

Quote:I now realize I'm a better digital designer than a tech writer; so, I hope this post was not too disjointed or rambling.

(03-31-2014 07:43 PM)eried Wrote:  I will check the source once you publish it, I still don't have a interesting project in mind to make as a first challenge to push my learning. I have seen several chinese xilinx fpga kits but I would prefer something a bit more elaborated like 'Arduino' FPGA.

(03-31-2014 11:06 PM)Jim Horn Wrote:  *Thank you* for describing your project! Having used CPLDs and FPGAs since 1985 (in CUPL, PALASM, ABEL, PHDL, AHDL, VHDL and Verilog), I'm eager to see and learn from your code. Perhaps I can use it to resurrect my first calculator - an HP-25 with a dead ACT chip.

(04-01-2014 05:52 AM)bkn42 Wrote:  Ok, the project has been pushed to github (<- link to project). All of this is my own code except for the UART and low level PS/2 interface code -- I got these from OpenCores.org.

The tcl/tk GUI I mention before is not there, yet. I still need to clean it up. I'll post it soon.

Please, take a look at the code and ask questions and/or leave comments.

In a posting soon, I'll start describing one of the simpler modules, first: the BCD ALU (files bcd_alu.vhd and bcd_alu_lut_pack.vhd).

Brian

(04-02-2014 10:11 AM)eried Wrote:  Cool! thanks.

On a related matter, what do you think about http://www.ebay.com/itm/XC3S250E-XILINX-Spartan-3E-FPGA-Development-Board-10-Accessory-Modules-Kits-/261135684763?pt=LH_DefaultDomain_0&hash=item3ccce6549b this kit compared to papilio? I am just looking for a very beginners kit like to make a simple calculator or something like that as a first project.

(04-02-2014 07:59 PM)bkn42 Wrote:  

(04-02-2014 10:11 AM)eried Wrote:  Cool! thanks.

On a related matter, what do you think about http://www.ebay.com/itm/XC3S250E-XILINX-Spartan-3E-FPGA-Development-Board-10-Accessory-Modules-Kits-/261135684763?pt=LH_DefaultDomain_0&hash=item3ccce6549b this kit compared to papilio? I am just looking for a very beginners kit like to make a simple calculator or something like that as a first project.

I've seen these FPGA boards and I'm very tempted to get one -- seems like you get a lot for your money.

I'm going to refer to the ebay link you posted, specifically the picture of the fpga board, Core3S250E. See items 5 (XCF02S flash) and 14 (JTAG interface connector)? The XCF02S flash holds the FPGA's configuration (i.e. your digital design) and the FPGA is loaded with it on power up. You need a way to program this flash and, unlike the papilio boards, you need to use the JTAG connector to program the flash. You will need to use a JTAG programming "pod" that is compatible with Xilinx's programming software tool. A real Xilinx programming pod is expensive -- about $200, I think. The same seller has this Xilinx compatible programming pod -- you will need something like this.

If you go this route, I would recommend the larger FPGA version, with the XC3S500E FPGA. It would allow you to do more once you get past the basics (like playing with the many available free soft processor cores). However, my HP Calculator Core easily fits in the smaller version.

Brian

(04-03-2014 03:26 AM)eried Wrote:  Hehehe I see, good that I asked you, chinese only answer "yes sir, please buy, we appreciate your business mr. #433929". About papilio, is 500k enough? I am just trying to be cheap but not restrictive to learn (how about these connector kits, like the arcade, or the segments screen?)

(03-31-2014 07:42 PM)Thomas Klemm Wrote:  May I suggest to add it to the Articles Forum? So it can be easily found.