history of the 4-level stack
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09-10-2014, 02:16 PM
(This post was last modified: 09-10-2014 02:18 PM by walter b.)
Post: #21
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RE: history of the 4-level stack
Thanks for bringing this info to our attention.
(09-10-2014 12:45 AM)Jeff_Kearns Wrote: I probably would have used postfix on store if we had more than 10 storage cells (0-9), but "STO N" seemed much more easily understood than "N STO". Fullheartedly concur with that. But now the next sentence following: Quote:However with more than 10 numeric memory cells then RPN would have won because it saves a keystroke. "STO 11" would have to be "STO 11 Enter" vs. "11 STO". Why? If a calc features up to 100 registers (00 ... 99) then "STO 11" doesn't require a trailing ENTER. What did I miss? d:-? |
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09-11-2014, 02:31 AM
Post: #22
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RE: history of the 4-level stack
(09-10-2014 02:16 PM)walter b Wrote: Why? If a calc features up to 100 registers (00 ... 99) then "STO 11" doesn't require a trailing ENTER. What did I miss? I agree, this doesn't make sense -- unless he meant to indicate a SINGLE-digit storage register in a calc with 100 registers. For example, "1 STO" is complete and unambiguous in this case, but "STO 1" requires a trailing ENTER (or a leading 0 before the 1). John |
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09-11-2014, 02:39 AM
Post: #23
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RE: history of the 4-level stack
(09-10-2014 12:45 AM)Jeff_Kearns Wrote: I probably would have used postfix on store if we had more than 10 storage cells (0-9), but "STO N" seemed much more easily understood than "N STO". It would seem that in a four-level stack, prefix notation (STO 1) does have one extremely important advantage over postfix (1 STO): the former preserves all four stack values (since the register number is never placed on the stack), while the latter would destroy the value in the T register (since the stack would lift when the register number was keyed in). John |
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09-11-2014, 04:50 AM
Post: #24
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RE: history of the 4-level stack
Very good point!
d:-) |
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09-11-2014, 08:35 AM
Post: #25
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RE: history of the 4-level stack
(09-11-2014 02:39 AM)John R Wrote:(09-10-2014 12:45 AM)Jeff_Kearns Wrote: I probably would have used postfix on store if we had more than 10 storage cells (0-9), but "STO N" seemed much more easily understood than "N STO". On the other hand, postfix allows to use computed register addresses (think of indirect addressing, but then on some machines that is also available). Free42; 48SX; 42S; 15C; DM-15; DM-41 |
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09-11-2014, 01:22 PM
(This post was last modified: 09-11-2014 01:49 PM by John R.)
Post: #26
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RE: history of the 4-level stack
(09-11-2014 08:35 AM)axd1967 Wrote: On the other hand, postfix allows to use computed register addresses (think of indirect addressing, but then on some machines that is also available). That's true, and it would open some intriguing possibilities. I just thought of another serious problem with postfix notation: it would not seem to admit unambiguous storage-register arithmetic operations without extra keystrokes, or new dedicated keys. In particular, suppose we want to add the contents of X to the contents of register 1, and store the result in register 1. In prefix notation, we simply key in "STO+ 1". However, we have a problem in postfix notation. The calculator can't use "1 STO+" to denote this operation because the previous contents of X (now lifted to Y as per the earlier comment) would be immediately stored in register 1 at the time that STO is pressed, so that the "+" would then be interpreted as a regular addition on the stack. The calculator also can't use "1 +STO", because the addition would similarly be applied to stack registers before any register storage would happen. It would seem that the only ways around this would be to require a trailing ENTER after a postfix STO (to tell the calculator no register-arithmetic operation is intended), or a shifted STO to indicate a pending trailing register-arithmetic operation, or dedicated keys for each possible register-arithmetic operation. None of these seems like a good option.... John |
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09-11-2014, 05:13 PM
Post: #27
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RE: history of the 4-level stack
So currently my impression is that all those discussions about the "ideal 4-level" stack would have been totally different had HP had less, or more registers...
Free42; 48SX; 42S; 15C; DM-15; DM-41 |
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09-11-2014, 05:49 PM
Post: #28
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RE: history of the 4-level stack
As stated in my manuals, 4 levels are just traditional (not ideal - the reasons for four were given by Mr. Osborne). The tightness of the 4-level stack motivated me to push an 8-level stack into the WP 34S. Eight stack levels let you calculate "sanssoucis". It's inherited by the WP 31S and will be by the 43S.
d:-) |
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09-11-2014, 07:21 PM
(This post was last modified: 09-11-2014 07:27 PM by d b.)
Post: #29
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RE: history of the 4-level stack
(09-06-2014 06:57 AM)walter b Wrote: BTW, the explanation is also found in one of the threads you collected in [5] (guess which?). You see, collecting's not sufficient, one should still be able to oversee one's collection. A member just reported this post saying the following about it, and I quote: "I find the constant snide remarks and slightly derogatory comments in this contributor's messages irritating and detrimental to this forum." I agree, and will warn Walter yet again about this. No one else here insults and belittles other members, sometimes to the point of driving them away from our community. Walter will not either, for a while. I will lock this thread but leave it on the board. It is mostly an interesting train of thoughts and every post, including Walters points, have been spot on except for the one where he acts like another member is a foolish child. Walter; I notice that you have deleted 24 of your own most offensive posts from the open board in the last couple of weeks. It would be easier to not write them in the first place. And FYI: the reporter was not one of those hated Americans. He is an accomplished and respected member of this forum who speaks English as a second (or maybe 5th) language, and he caught your innuendo. |
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