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teenix · (This post was last modified: 07-09-2019 11:16 PM by teenix.)

Hi Kees,

Many thanks for the reply. I agree, in that I suspect a few extra gates in the anode driver creates a simpler system overall.

cheers

Tony

(07-09-2019 07:18 PM)Kees van der Sanden Wrote: Hi Tony,

This is how I think it works:

The data to be displayed is controlled by the ARC (Arithmetic and Register Circuit).

The ARC has to synchronize the anode driver and cathode driver for displaying of the data in the correct way.

To synchronize the anode driver with the ARC, the anode driver resets itself if input B and D are high and Phi1 is low.
This is an internal reset signal, not accessible from the outside. This pulse is shown in Fig 18.
In this way the ARC knows (forces) the T state of the anode driver.

To synchronize the cathode driver with the ARC, the ARC generates the RCD (Reset Cathode Driver ?) pulse.
This pulse is indeed 5 us long and appears during T4.

The cathode driver gets the C CL pulse from the anode driver to step to the next digit.
(This signal could also be generated by the ARC, but this solution is more simple, I think).
Best regards,

Kees