41CL MMU Backup
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05-30-2020, 03:45 PM
(This post was last modified: 05-30-2020 05:33 PM by Ángel Martin.)
Post: #11
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RE: 41CL MMU Backup
(05-30-2020 02:32 PM)twoweims Wrote:(05-30-2020 05:22 AM)Ángel Martin Wrote: I guess this means I should probably modify the YRALL routine in the PWRX module to include the fix, it was written with a previous version of YFWR (the one still included in YFNZ) that did not alter page#4 mapping in the saved flash block. This is tricky. Depending on the CL board version YFERASE will delete the complete TOP sector (32K ) or only the selected block (4k). - YWALL in the original PowerCL assumed the complete TOP sector was deleted so only one YFERASE call was done, but - YWALL in the PWRX module assumes the top sector erasing is granular (i.e. by blocks), so there are two YFERASE calls for the 1EF and 1FF blocks. I don't remember how to tell which version your board is, we need Monte to remind us how to tell. BTW tinkling a bit further into this I think it's better to avoid the problem from happening rather than fixing it afterwards (prevention rather than cure). All we need is to call YFWR in YFNZ instead of YFWR in YFNX to avoid the problem, so here's the updated listing o YWALL (note steps 13 and 15 used to switch between the two YFN's versions)) Code: 01 LBL "YWALL" ARRGGHHHH now I remember why this won't work either: the YFWR functioni from YFNZ must be executed from RAM to begin with! - full circle to the same place.... So never mind, I guess we're back to having to remap the library#4 after YFWR (in the YFNX) has terminated.... "To live or die by your own sword one must first learn to wield it aptly." |
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