Peculiar HP 97 card reader quirk
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03-05-2021, 12:12 AM
(This post was last modified: 03-05-2021 12:41 AM by teenix.)
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RE: Peculiar HP 97 card reader quirk
The software engineers must have thought about this although may have overlooked this case.
For a card load operation in a 67 which should be the same as a 97... The first code snippet is when GTO .050 was used with MERGE The second code snippet is when GTO .224 was used with MERGE Code:
You can see that the RAM address is set to 40 in the first example and the first card data will be placed in the appropriate register location that corresponds to step 51, in this case byte [1] of register 40. regC [2][1][0] = 128 = 28hex(40) + offset 1 = step 51. The second example shows RAM address 15 which is not program memory area. Also register C[1] = 0 which causes the storage part of the code to be bypassed. This will occur also, if there is not enough steps before the end of program memory to load a card into, although no error is raised. regC [2][1][0] = 70F = 0Fhex(15) + offset 7 = step (???). Also there is no offset 7 in a register only 0 - 6. Maybe your 97 is actually trying to access an invalid RAM location. Both my 67 and 97 simulators report an error for single or dual card merges from step 224. There are multiple reason why an error may be raised in the code - too early in the morning :-) cheers Tony |
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Peculiar HP 97 card reader quirk - Dave Britten - 03-04-2021, 02:55 PM
RE: Peculiar HP 97 card reader quirk - teenix - 03-05-2021 12:12 AM
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