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HP-71B MultiMod ROM Emulator - Issues ?
03-27-2021, 09:19 AM (This post was last modified: 04-12-2021 08:40 PM by J-F Garnier.)
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RE: HP-71B MultiMod ROM Emulator - Issues ?
(03-27-2021 06:22 AM)mfleming Wrote:  
Quote:It seems that there is a compatibility issue with some 71B.
All three modules work on S/N: 2713A00041 but none works on S/N: 2410A00146.
I know the card reader port works on S/N: 2410A00146 because it usually hosts a working FRAM71 module.
Thankfully I was dumb-lucky enough to to acquire a second 71B during development, an early 2406A metal back model (original model I was using was 2724A). These very early models have a significantly different bus access timing profile compared to the published HW IDS specs. My early 71B failed or locked up when first used, so I had to adjust emulator timing to match. J-F has some 'scope traces illustrating the differences in timing vs. later models.

For anybody interested here is the document I shared with Mark some time ago, with the timing difference on last slide.
The difference seems to be related (at least on my machines) to the CPU type: 1LF2 on first HP-71B generation, then 1LK7 (same as in the 28C) in the latest HP-71B.
It could be interesting to correlate the problems with the CPU type, I wrote a small LEX to identify the CPU type, it can be found here.

Quote:Here's a bit of fun. Try poking a "1" to the 2C000 address so that uLib52 isn't enumerated, then execute a uLib command. It works, at least for me, despite the fact the uLib ROM doesn't show in VER$, SHOW PORT, or CAT :PORT(5.03). Ack! Code hairball.

No that's not possible, if the ULIB52 keywords are working, the VER$ should also.
It may just that you're also using the FORTH Pac revision B that already includes STRUTIL which provides a part of the User Lib keywords. Try with a ULIB52 function that is not in STRUTIL, such as COMP$(" ").

J-F

[edited to correct CPU ref 1LK7]
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RE: HP-71B MultiMod ROM Emulator - Issues ? - J-F Garnier - 03-27-2021 09:19 AM



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