A TTL approach to the HP-35

[Alejandro Paz(Germany)]

Hello together,

I have started to publish some of the work I have been involved lately (mostly FPGA versions of Woodstocks, Nuts, Saturns and Classics).
This time I want to re build the HP-35 using TTL logic. FPGAs do not cut it anymore :-D. It is a work in progress like everything we do around here. I posted it in the retrobrew forum (people like to post re builds of old machines there) HP-35 in TTL, but it belongs here anyways.
The work in progress is at Classic at github.

My idea is to kind of mimic the functionality of the FPGA version (which is based on a simplified woodstock processor) i.e. it is not bit serial (too many shift-registers) but nibble parallel. I got a handful of very rare 74S189 and some LS189. I have to test them (because of the source, they can be very well repainted, most probably are). I may end up using a 2 Kx8 RAM for the registers, the LS189 are very hard to come by if the ones I got are not real ones. And using '670 (or '170s) means a sea of chips for almost no benefit, ok they have separated read-write ports.