A TTL approach to the HP-35

[Alejandro Paz(Germany)]

I have seen those TTL projects, very nice, I thought more on the lines "let's use all these chips you have been collecting" and "the Classic processor should be simpler than a PDP-11" (haha).
Relays may be a way too, bit serial is probably the way to go .
Maybe when I am finished with TTL I'll try something else like ECL it intrigues me, I still have to learn layout IC layout, on the list .

The 14 segment display was developed by a forum member some years ago, I tried to get it working using PWM outputs with poor results. A dot matrix display (like the DOGM132) is what I'll finally use, the board shown in the woodstock project has a large enough FPGA for the Nut processor.

Thanks for the support !

PS: I do not know how many gates I'll need. The P register as it is needs 6 gates chips (AND, OR, XOR) two MUXES '153, an ADDER '283 and the '175 as register. I also have some very rare '281, this could replace most of the logic (a '193 can also and is easier to get).
The ALU/REGS block needs the RAM for the registers (either 7 '189 or one 2048x8), two ADDERS, two '175s, two MUXES '153 a '74, a '244 some assorted gates and a couple of '138s to sequence the read/latch/write cycles. Still working on this.