A TTL approach to the HP-35
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05-16-2021, 02:01 PM
Post: #9
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RE: A TTL approach to the HP-35
This may sound a bit recursive but I remember a project (on Hackaday I think) where someone put an FPGA on a PCB the size of a 16-pin DIP. The FPGA could be programmed to mimic any desired SSI chip. A lot easier than building a fab in your garage
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Messages In This Thread |
A TTL approach to the HP-35 - Alejandro Paz(Germany) - 05-15-2021, 06:40 AM
RE: A TTL approach to the HP-35 - PANAMATIK - 05-15-2021, 07:20 AM
RE: A TTL approach to the HP-35 - Jurgen Keller - 05-15-2021, 02:34 PM
RE: A TTL approach to the HP-35 - teenix - 05-15-2021, 05:00 PM
RE: A TTL approach to the HP-35 - mfleming - 05-15-2021, 05:32 PM
RE: A TTL approach to the HP-35 - PANAMATIK - 05-15-2021, 10:55 PM
RE: A TTL approach to the HP-35 - mfleming - 05-15-2021, 02:42 PM
RE: A TTL approach to the HP-35 - Alejandro Paz(Germany) - 05-16-2021, 05:58 AM
RE: A TTL approach to the HP-35 - mfleming - 05-16-2021 02:01 PM
RE: A TTL approach to the HP-35 - Alejandro Paz(Germany) - 06-03-2021, 07:31 AM
RE: A TTL approach to the HP-35 - teenix - 06-03-2021, 12:03 PM
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