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Casio 4bit SRAM replacement project
05-13-2022, 05:59 PM
Post: #2
RE: Casio 4bit SRAM replacement project
A bit more progress on this project. I can now read directly from the RAM via the expansion bus while the computer is in idle mode. The PIC waits until it detects the computer is in idle mode, starts outputting its own quadrature clock, transmits and address to start reading from and reads in 16 nibbles. This morning I added the ability to 'reflect' what was read, with /CE high so the computer's RAM ignores it. This was done to confirm what was being read.

Now to pack/unpack nibbles into bytes and do a full dump/restore of the computer's RAM.


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RE: Casio 4bit SRAM replacement project - Jeff_Birt - 05-13-2022 05:59 PM



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