HP-71b - Future "SD-RAM" Module - viable ?

[Jeff_Birt]

I glanced quickly though the PDF, thanks for that. I was not meaning to imply 'only' three I/O pins and nothing else would be required.

Looking at page 14, Figure 7, Ignoring the components needed for the differential bits of the circuit to the right you have a Tx line and an Rx line. There are no other control lines used. Thus with the other parts added to create and decode the differential signal you 'could' use only 2 I/O lines.