Panasonic HHC ROM 'capules'

[Jeff_Birt]

I was chatting about this with a friend last night and we were scouring through datasheets looking for a similar 'power on until first read' spec for EPROMs, which does not exist. He then suggests looking at the programming specifications as the programmer will turn power on and need to know how quickly it can then start programming the part. For garden variety 27C128 type parts this was about 2us. This is likely the reason they provide the /8 pulse stretcher for 'slow' memory.

With a 1mhz clock on a 6502 one instruction cycle is 1us. Each opcode takes 2-6 instruction cycles so it would take 17~50 opcodes to eat up the 100us power rise time of the flash memory.

I'm going to try to measure the time from power on of the EPROM until A13 is twiddled. Looking at the hand drawn schematics reveal A13 is used as /CE for the option ROMs. This should provide an answer as to how much of a start up delay there is.