HP19C - Behaviour of the ACT Processor Status Bits

[brouhaha]

(03-07-2023 12:18 AM)Mike T. Wrote:  I'm trying to get my head around the way the processor status bits behave on the HP19C

The 19C was the second-trickiest HP pre-Saturn calculator I developed simulation for, after the 97. The 19C, and the Topcat models other than the 97, have somewhat complicated flag and keyboard handling. There are several things to bear in mind:

* The PIK/PICK chip ((HP was inconsistent in the naming) does its own keyboard scanning without regard to the ACT. It doesn't know anything about the ACT keyboard scanner. It does, however, use the cathode driver outputs as its keyboard scan lines, just as the ACT key scanner does,

* The ACT doesn't know about the existence of the PIK/PICK chip. It just does the same things it does without the PIK. In the 19C, and Topcat models other than the 97, the ACT key scanner is used as a set of extra flag inputs.

* The ACT key scanner will, if multiple keys are pressed with the same scan line (same cathode driver scan line, not necessarily the same as the mechanical layout of the keyboard), generate a keycode with the codes for the return lines logically OR'd together. The ACT key return lines KBA through KBE (pinst 5 through 9) have return codes 4, 3, 2, 1, and 0. This means that in a multiple key combination, KBE can't be resolved at all, and KBB can't be distinguisted from a combination of KBC and KBD. The keyboard scanner can be used as three flag inputs, KBA (4), KBC (2), and KBD (1). To read these, they should be strobed at the same time as KBE (0). If KBE is not used, then it's not easy to detect the condition that none of KBA, KBC, and KBD are driven.

* The ACT has one flag output, F0, which is driven based on the state of the S0 status bit.

* The ACT has two flag inputs, F1 and F2, which affect the S3 and S5 bits. These are set by a level on the corresponding pin.

* For the ACT flag inputs, removal of the active level from the pin does NOT clear the corresponding S bit. The S bits have to be cleared by the microcode, so testing a flag is often preceded by clearing the flag.

The fact that there are only two flag input pins is the cause for all of the added complexity in the hardware flag handling of the 19C and Topcat models. (The 97 doesn't need any of this nonsense, because the CRC chip provides additional flag inputs for the 67 and 97.)

The 19C needs flag inputs for:

* low battery
* PIK flag output
* PRGM mode
* printer "NORM" mode
* printer "MAN" mode
* keyboard return line 2 (to detect held-down SST, BST, R/S, and SPC)

F1 (S5) is used for low battery.
F2 (S3) can be set by the PIK flag output.

If F0 (S0) is active, then also:
F2 (S3) can be driven by the PRGM mode switch.
ACT key scanner inputs KBA, KBC, KBD, and KBE are driven by the MAN and NORM switches, keyboard return line 2, and F0 (S0), respectively.

This means that to read the inputs that drive the ACT key scanner, you need a sequence like:

Code:


        0 -> s 0             ; disable printer mode switch etc.
        0 -> a[w]
L2745:  0 -> s 15            ; clear key buffer
        if 1 = s 15          ; keep trying until it clears
          then go to L2745
        1 -> s 0             ; enable printer mode switch etc.
L2751:  0 -> s15             ; clear key buffer
        if 0 = s 15          ; wait for the keyboard scanner to recognize the inputs
          then go to L2751
        keys -> a            ; get the key scanner value

Now the low three bits of digit one of the A register will contain:

* bit 2 set (values 4 or 5) if the printer switch is in MAN mode
* bit 1 set (values 2 or 3) if printer switch is in NORM mode
* bit 1 set (values 1 or 5) if SST/BST, R/S, or PRTx/SPC key is held down
* 0 if none of the above

The high bit of digit one, and all of digit two, are the encoding of which cathode driver line was active when the "key press" was recognized, and should be ignored.

On the 19C, the F0 (S0) output is also used for bank selection between two of the ROMs, instead of the "bank switch" instruction (octal 1060, hex 230) used in most other bank-switched models of the Woodstock generation. This is because HP used the old ROM-only ROM chips for the bank-switched quads, rather than the newer ROM/RAM chips. (Though the 19C does also have one of the ROM/RAM chips.) It was done that way because the ROM/RAM chips are NMOS, and can't be battery backed. The 19C uses two separate 5061-0469 CMOS RAM chips for the continuous memory.

The 91 and 92 don't do all of the switch/flag stuff exactly the same as the 19C, but they are similar.