WP34s Repurposing Journey PhotoJournal

[MarkHaysHarris777]

Greetings,
Well, this is my last formal post to 'this' photo-journal; thank you all for your interest, it has been fun and a real pleasure. I am going to post two last hi res pics attempting to use the tip|(url trick) that Dave F is desperately trying to teach me-- trying to get the primary photos in a small space for clarity and space management, yet provide the hi-res detail behind that... again, first the pics (if you click the pics you should get the hi-res image), and then the comment:



I doodled this 'napkin sketch' while studying with my daughter on her campus this past weekend. She is studying physics this term (specifically resistors, caps, and inductors) and she asked how I know where I want a circuit to go, as it were (so we talked about it). There is an amazing amount of planning that goes into a Manhattan style bread-board.

Some of you are no doubt wondering why the transistor? "Why didn't the guy just drive the simulated current load directly with the inverter--- the one driving the base of Q1? All of my projects contain at least ONE 2N2222A NPN transistor; its my small lasting memorial to Bell Labs and the invention that makes ALL of my hobby (and profession) possible. Thank you Bell Labs.

For me the building of a Manhattan style bread-board (loved by all amateur radio 'makers' and other electrical engineers) is 'primarily' about sculpture. i build bread-boards for the same reason that my wife crochets, or my daughter needle-points; its art, and its creative release (only secondarily is it important that it 'functions'). The idea that we have some Platonic ideal that we are striving for and through our crude finger tips and a ghastly soldering iron out comes an Aristotelian representation of that ideal reality (sometimes it works, and sometimes it doesn't, but its art none the less).

This quad Nand gate provides the logic for the voltage fault latch, and for the simulated load latch (four gates, two latches). Both latches are reset by a line that runs directly from the reset switch to the pull-up resistors of each latch, which toggles the latches off. The voltage fault latch is toggled 'ON' by the voltage monitor (LM339N comparator). The simulated load latch is toggled 'ON' by the 'Vcc Test' switch seen in this photo left bottom.

Again, thanks for your interest and time.

PS (thank you Dave, if this photo thing doesn't work, believe me I gave it the old college try!)

PPS The board layout in the 'napkin sketch' showing the latch driving the Q1 transistor directly does not work; the base-emitter current grounds out the latch preventing it from actually latching--duh. The actual device has an inverter 'buffer' (as shown in the schematic) wired to drive the Q1 base. :-}

PPPS Well, I kept this whole project under five(5) chips and under twenty(20) gates. Generally, if a project is five or more chips and 20 or more gates its time definitely to consider a micro-controller instead. But, again, if the goal is spending time with your assistant building a functional sculpture, well forget the micro-controller and go for a Manhattan style bread-board!

Cheers,
marcus