DM42: The internal view (hardware components)

[jebem]

Input/Output interfaces visible on the PCB

Besides the standard USB I/O port and the InfraRed LED, at least two additional I/O ports are apparently available providing they are routed to the SoC STM32L476 VGT6 processor:

SPI2: This is an obvious standard Serial Peripheral Interface bus.
Located close to the battery cell and Reset/Pgm buttons.
This port is cleared labeled on the silkscreen close to the 32.768K-E Crystal.

Identified connector terminals:
GND: Ground
SPI2_SCK: Serial Clock
SPI2_CS: Slave select
SPI2_MOSI: Master Output / Slave Input
SPI2_MISO: Master Input / Slave Output
VCC: Power Supply

The STM32L476 provides three SPI buses and one Quad SPI bus.


LPUART1: This seems to be the Low Power Universal Asynchronous Receiver Transmitter interface provided by the SoC STM32L476 VGT6 processor.
Located close to the buzzer wires solder joints.

Identified connector terminals:
VDD: Power Supply
RX: Receiver Data line
TX:Transmitter Data line
GND: Ground


Two additional unidentified PCB interfaces are visible close to the buzzer:
J4 with 4 pins.
J1 with 6 pins.

The the SoC STM32L476 VGT6 processor provides a Serial Wire JTAG debug port (SWJ-DP).
According to the ST documentation, this is an ARM standard CoreSight debug port that combines a JTAG-DP (5-pin) interface and a SW-DP (2-pin) interface.
J4 could be used as the development/debug interface, but from the picture it is not possible to see where the PCB traces are going to.