Some basic questions for the HP-41 MCode gurus here.
After a pause of 30 years, I am starting to relearn HP-41 MCode again.
About the interaction between register C and RAM register 0 of a selected RAM chip ...
Available instructions
Code:
DEC BIN OCT HEX HP J/DA ZenROM NEWT Description
---- ---------- ---- --- ---------- ---------- ---------- ---------- -----------------------------------------
Copy RAM register 0 (T) to C
0040 0000101000 0050 028 REGN=C 0 WRIT 0(T) REG=C 0/T REGN=C Copy C to RAM register 0 (T)
---- ---------- ---- --- ---------- ---------- ---------- ---------- -----------------------------------------
0752 1011110000 1360 2F0 DATA=C WRITE DATA WDATA DATA=C Copy C to selected register
0056 0000111000 0070 038 C=DATA READ DATA RDATA C=DATA Copy selected register to C
---- ---------- ---- --- ---------- ---------- ---------- ---------- -----------------------------------------
Note: interestingly opcode 0x038 take the same place in the Class 0 Subclass E group (0000-1110-00) as the would have been C=REG 0/T instruction.
Extract from MCODE for Beginners from Ken Emery page 53
Code:
Sometimes we don't know exactly where in a RAM chip we will be, and we can't have the RAMSLCT pointer being moved on us.
How do we read or write to the selected RAM register without moving the RAMSLCT pointer? We use the READ DATA and WRITE DATA instructions.
These instructions read and write data between the C register and RAM without modifying the RAMSLCT pointer.
The READ DATA instruction is sometimes listed as READ 0 by some disassemblers. THIS IS INCORRECT! There is no such thing as a READ 0 instruction.
This was a mistake made by some of the early pioneers in the MCODE field, working without factory documentation that appeared later.
Live trace (extract) from Genesis-41 doing a RDN function who's implementation is actually doing 3 roll up !!!
Code:
,29DA 1 14ED 04E N C=0 ALL ; C[13:0] = 00000000000000, CARRY = 0
,29DC 1 14EE 270 p RAMSLCT ; RAM reg = 000
,29DE 1 14EF 038 8 C=REG 0(T) ; RAM read (C=08000000000000) from reg = 000 (subclass E)
,29E0 1 14F0 0AE A<>C ALL ; A[13:0] = 08000000000000, C[13:0] = 000000000F0000, CARRY = 0
,29E2 1 14F1 078 x C=REG 1(Z) ; RAM read (C=07000000000000) from reg = 001 (subclass E)
,29E4 1 14F2 028 ( REG=C 0(T) ; RAM write (C=07000000000000) to reg 000 (subclass A)
,29E6 1 14F3 0B8 C=REG 2(Y) ; RAM read (C=06000000000000) from reg = 002 (subclass E)
,29E8 1 14F4 068 h REG=C 1(Z) ; RAM write (C=06000000000000) to reg 001 (subclass A)
,29EA 1 14F5 0F8 C=REG 3(X) ; RAM read (C=05000000000000) from reg = 003 (subclass E)
,29EC 1 14F6 0A8 REG=C 2(Y) ; RAM write (C=05000000000000) to reg 002 (subclass A)
,29EE 1 14F7 0AE A<>C ALL ; A[13:0] = 05000000000000, C[13:0] = 08000000000000, CARRY = 0
,29F0 1 14F8 0E8 REG=C 3(X) ; RAM write (C=08000000000000) to reg 003 (subclass A)
From the above trace, we clearly see at line 29DE, dissambled as C=REG 0(T) instead of RDATA, loading C register with register 0 of the selected RAM chip 0.
Question 1: could you explain why RDATA is not the equivalent of the inexistant C=REG 0(T)
Question 2: what are the differences between WDATA and REG=C 0/T
Thanks
Sylvain