HP-71B MultiMod ROM Emulator - Issues ?

[mfleming]

Hey Diego,

Enjoy the good weather there, hurricane season is only a couple of months away. They broke records last year!

If you're that bored, check the code in the github repository. The result of timing risk analysis is in the timing considerations and timing failure point sections near the bottom of the header commentary in the rommain.asm file. More detail is in the header of the LOADREG macro in the macros.inc file. Given the tight timing constraints I had to decide between favoring hosts with fast clocks versus those with slow bus settling times. I went with fast clock, so some fraction of slow machines may fall off their far end of the bell curve. Those would be the early models with the Saturn 1LF2 CPU by J-F's analysis.

Them's the breaks,
~Mark