(16C) Linear Feedback Shift Registers
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11-01-2021, 06:49 PM
Post: #6
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RE: (16C) Linear Feedback Shift Registers
Here is a programm for an LFSR of any length (up to 64 bits) and any structure, such as this one for example.
The n XOR gates form an adder for n+1 1-bit numbers without carry. This means that the output of the last gate is 1 if the number of ones at the inputs is odd. This leads to a very simple programm. The WSIZE is set to the length of the shift register (in the example 8). The "polynomial" is stored in register 0 (in the example 10111000 binary). The value of the shift register is in register 1 (initial value not equal to zero). A step in the shift register is thus calculated as follows: Code:
For such problems, the HP-16C is exactly the right calculator. Thank you for the inspiring thread and the stimulating article. Hartmut |
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Messages In This Thread |
(16C) Linear Feedback Shift Registers - badacktor - 06-14-2021, 06:13 PM
RE: (16C) Linear Feedback Shift Registers - Gamo - 06-15-2021, 09:59 AM
RE: (16C) Linear Feedback Shift Registers - cdmackay - 06-15-2021, 10:48 PM
RE: (16C) Linear Feedback Shift Registers - badacktor - 06-16-2021, 06:14 PM
RE: (16C) Linear Feedback Shift Registers - badacktor - 07-02-2021, 06:30 AM
RE: (16C) Linear Feedback Shift Registers - wynen - 11-01-2021 06:49 PM
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