FORTH for the SHARP PC-E500 (S)

[robve]

(09-16-2022 11:09 PM)Helix Wrote:  I like some of the new additions.

Note that there are also a number of new separate Forth500 additions and examples: CALENDAR.FTH (borrowed from Jupiter ACE), HANOI.FTH (a classic, shows deep recursion), HITOMEZA.FTH (patterns), LINES.FTH (a bounding lines screen saver), MORE.FTH (like Unix more command), REDEF.FTH (redefine any Forth word, like the Jupiter ACE REDEFINE word), SAVE.FTH (save Forth500 image with all user code to a file), and TED.FTH. I kept TED small, so loading does not take too much time and the application itself does not require much memory to run. But it pushes memory limits on an unexpanded E500.

(09-16-2022 11:09 PM)Helix Wrote:  Now that you have vocabulary words, and if you have time to waste, you can write an assembler.

Give me a day or two

Eager to try ESR-L CPU programming? Try the XASM126 assembler written in Pascal. It's included with Forth500 to build Forth500. Also included are ESR-L and E500 technical manuals. I've translated the Japanese XASM documentation to English for convenience and CPU resources

OK, so honestly most of the Forth500 improvements were done during an extended weekend fairly recently to execute my plan I'd talked about before, i.e. to use a different method for the Forth execution token fetch/execute cycle and other internals that require 16-to-20 bit address conversions. But testing and iterating to ensure perfection always takes some days with projects like this, especially since testing is done on the actual machines, before I'm confident to commit the update. This is necessary, because over 900 lines of assembly were changed/removed/added to the 2.0 release. All of this taking only 16 more bytes of the binary, by shuffling things and by reusing code in cases where this wasn't done before.

IMHO the low-power ESR-L CPU ISA is interesting and powerful for an 8 bit CPU with 20 bit address space. OK, it's not a famous Z80 or HP Saturn, but I actually like it better than a Z80 (don't know if anyone can agree or not). Most of the Sharp IQ and OZ Wizards have this CPU on board, no surprise. It runs a 2.3MHz clock. But you have to divide this by 3 since a single CPU instruction cycle takes three clock ticks. So effectively it runs at 768KHz. This makes sense, because a typical instruction fetch-decode-execute takes three ticks and just one cycle on the ESR-L when other CPUs take 3 cycles. Also, most CPU instructions on the ESR-L take only a few CPU cycles, such as 2, 3 or 4 CPU cycles for 8, 16, 24 bit register moves respectively.

- Rob