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FORTH for the SHARP PC-E500 (S)
09-18-2022, 12:21 AM (This post was last modified: 10-06-2022 03:40 PM by robve.)
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RE: FORTH for the SHARP PC-E500 (S)
(09-17-2022 10:44 PM)Helix Wrote:  The only CPU I know is the SC61860, because I learned the machine language of my Sharp PC-1401. But I've forgotten everything since that time!
Do you know if there is a common CPU that is comparable to the ESR-L, if my question makes sense?

I tend to think of the ESR-L as a mix of Z80, 6809 and SC61860 (ESR-H or "old-SC") flavors. The German Systemhandbuch section 12 on the CPU gives a good technical overview, albeit in German. There are also suggestions on how to reserve space for machine code and there is info on the PC-E500 internals. For the FCS and IOCS system calls, see the PC-E500 technical manual. Both texts are included as PDFs in the Forth500 resources. There is also a ESR L CPU technical manual.

The ESR-L machine code prefix bytes are the odd ones for this CPU. A prefix byte applies to internal RAM registers. The internal RAM acts like a large register window with base pointer BP. It allows for a clever way to run routines that have their private internal RAM by shifting the window. For example, BASIC uses an internal RAM window. Forth500 too, but using a different location of the window. This is done with "prefix bytes" added to CPU instructions to address internal RAM. Without a prefix byte, an internal RAM register (a location) is always relative to the BP. So internal register (ex) for example is really (BP+ex) when prefix bytes are turned off with pre_off. A prefix byte must be used for absolute RAM register addressing like (ex) but with prefix bytes on with pre_on, which is required with the operating system FCS and IOCS calls. A prefix byte can also be used to address internal RAM registers relative to the PX index register, either (PX+n) or (BP+PX). I've only used (BP+PX) for the floating point routines, to index BCD digits stored in internal RAM. Note that internal RAM memory is written (n) with location n (could be BP+n), whereas external RAM is written [nm] for 16 bits nm or written [lmn] for 20 bits lmn. Registers are one byte (A, B, IL), two bytes (BA, I) or three bytes (memory/index registers X, Y and stack pointers U, S like the 6809). Internal RAM can contain integers of one, two or three bytes. Register BA combines A (lo) and B (hi). I combines IH and IL. Assigning to IL makes IH zero (IH is not directly addressable). That's often very handy, as it results in shorter and slightly faster code. There are RAM memory block moves MVL with IL number of bytes moved. Internal RAM block binary addition ADCL and subtraction SBCL instructions and BCD DADL and DSBL. Except for those specialized cases, most ESR-L instructions should be easy to get familiar with. Perhaps take a look at the Forth500.s assembly? It's all explained and annotated.

- Rob

EDIT: mention PC-E500 technical manual.

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Messages In This Thread
FORTH for the SHARP PC-E500 (S) - Helix - 09-06-2021, 11:41 PM
RE: FORTH for the SHARP PC-E500 (S) - dmh - 10-02-2022, 02:29 PM
RE: FORTH for the SHARP PC-E500 (S) - dmh - 10-04-2022, 12:46 PM
RE: FORTH for the SHARP PC-E500 (S) - dmh - 10-04-2022, 10:55 PM
RE: FORTH for the SHARP PC-E500 (S) - robve - 09-18-2022 12:21 AM

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