HP-75C/D Processor Question

[Martin Hepperle]

Indeed, the Capricorn architecture supports register groups of 8 bytes = 64 bit length.
You can e.g. add two 64 bit integers with a single opcode.
And it has quite a lot of registers!

PUMD R70,+R12
for example pushes 8 bytes in one go to the stack addressed by R12

ADM R70,R60
adds the 8 bytes in R60-67 to the bytes in R70-R77 in a single operation.
ADM R76,R66
adds only 2 bytes in R66-67 to the bytes in R77-R77 in a single operation.

And you could do that in binary as well as in BCD mode.

This /and the flexibility to address 1 to 8 bytes as one "register" was really outstanding for its time.

Another feature is the indirect addressing and the indirect-indirect addressing capability.
Most other processors at the time had to shuffle bytes between RAM and the few registers to achieve similar effects.

However, the external bus is 8 bits and the clock frequency usually rather low (about the same as an Apple II or an Epson HX-20).

One drawback is, that it did not have multiply or divide opcodes.