Post Reply 
What if?
05-17-2016, 01:44 AM (This post was last modified: 05-17-2016 01:51 AM by Paul Berger (Canada).)
Post: #4
RE: What if?
The first problem that I see is that while your data bus may be twice the width of each individual CPU, there will only be one address bus, so you options are to either have the two CPUs run lock-step or have hardware to arbitrate access to the address bus. If each of the CPUs had their own local cache memory then they would not necessarily need access to the address bus 100% of the time, but I would expect that there would be contention quite often. This contention could possibly be reduced with tuned caches.

In the real world one of the reasons for having a wider external data bus that is wider than the processors data bus is the DRAM memory that we usually think of as the system memory is very slow compared to the processors speed, this is why modern processors have multiple levels of faster SRAM cache. In the DRAM it takes the same amount of time to read and write a location in a 8 bit wide DRAM array as it does in a 64 bit memory array the difference is in the second case you are accessing 8 times the amount of data. Accessing the DRAM using a very wide data bus coupled with caching can be to a great advantage. Say your DRAM array was 64 Bytes wide if you cache line was also 64 bytes that would mean you could load and store whole cache lines in a single memory operation which would greatly speed up access to the otherwise slow DRAM. The downside of doing this is it greatly increases the complexity of the PC boards and along with that the cost.

BTW any computer with a built in display device, either built into the system board or in the form of an adapter card has to have dedicated memory for the display, because in order to keep the image on the screen the display hardware has to cycle through it refresh buffer to keep drawing the image over and over. The alternative is to use high persistence phosphor CRTs and have the CPU draw the screen and then go away and the image will remain and only slowly fade away before the CPU has to come back and redraw it, however having seen systems like that, I would sooner stick with display hardware with a refresh buff like any PC even the old CGA and MDA display cards in the first IBM PC had dedicated memory for a refresh buffer.
Find all posts by this user
Quote this message in a reply
Post Reply 

Messages In This Thread
What if? - Joseph_21sv - 05-16-2016, 02:45 AM
RE: What if? - Garth Wilson - 05-16-2016, 07:33 AM
RE: What if? - Joseph_21sv - 05-17-2016, 12:23 AM
RE: What if? - Paul Berger (Canada) - 05-17-2016 01:44 AM
RE: What if? - Joseph_21sv - 05-17-2016, 11:28 PM
RE: What if? - Paul Berger (Canada) - 05-18-2016, 01:20 AM
RE: What if? - Joseph_21sv - 05-20-2016, 03:49 PM
RE: What if? - Paul Berger (Canada) - 05-20-2016, 08:10 PM
RE: What if? - Joseph_21sv - 05-21-2016, 05:16 PM

User(s) browsing this thread: 1 Guest(s)