41CL MMU Backup

[Ángel Martin]

I hope I'm not confusing things, but If I understand the concept YFWR (1) temporarily remaps page #4 to 0x804, then (2) it runs the transient code, then (3) does the flash writing and then re-maps page #4 to its previous setting.

But this means than when using YFWR on 0x804 itself the information written to flash is under the conditions of step (2), so it says "page #4 is mapped to 0x804". Therefore restoring that block with YMCPY to 804 is going to preempt the actual page#4 mapping (in your case to the Library#4).

An interesting problem... maybe you can try to do a manual re-mapping to Library#4 after YFWR but you cannot perform any Library#4 dependent action until that is done, which it's unlikely unless the MMU is entirely disable of course.

"804>1F1"
YFWR - saves MMU settings with INCORRECT page#4

Then to restore things:

MMUDIS - disables MMU, so plain YFNZ is active
"1F1>804"
YMCPY - this step breaks the current Library#4 mapping
"804040-8120"
YPOKE - to restore that mapping
MMUEN - enables all mappings, so YFNX is active

I guess this means I should probably modify the YRALL routine in the PWRX module to include the fix, it was written with a previous version of YFWR (the one still included in YFNZ) that did not alter page#4 mapping in the saved flash block.