Post Reply 
[41CL WARP] XEQ+ oddness
04-11-2021, 02:12 PM (This post was last modified: 04-12-2021 02:31 AM by Sylvain Cote.)
Post: #38
RE: [41CL WARP] XEQ+ oddness
Incomplete list of HP & EPROM/Flash box/modules bank switched product introduction year ...
  • 1983: HP-41CX released (page 5, BS)
  • 1985: HP Advantage module released (12K ROM, BS)
  • 1985: CMT-10-16KB module released (16K EPROM, BS)
  • 1987: ZEPROM module released (16K EPROM, BS)
  • 1987: HP IR Printer Module, with two banks always in page-6
  • 1987: VM Electronics HEPAX Module, with FOUR banks in one self-relocating page
  • 2003: Clonix-41 module released (24K Flash, BS) / latest: Clonix-D (48K Flash, BS)
  • 2004: NoVRAM module released (24K Flash & 16K FRAM, BS) / latest: NoV-64d (48K Flash & 64K FRAM, BS)
  • 2005: MLDL2000 card reader module released (255 ROM banks & 63 SRAM banks, BS)
  • 2011: 41CL Beta boards shipped (2MB Flash & 512K SRAM, BS) / latest: 41CL v5 (8MB Flash & 512K SRAM, BS)
  • 2020: DM41X released (6MB Flash, BS)
  • 2020: bank switching emails exchanged with Monte, Diego, Meindert, Håkan, Ángel & Robert
CMT-10-16KB module from Corvallis MicroTechnology: (discontinued)
  1. the module uses a 27C256 EPROM (256k bits = 16k of 16 bits words)
  2. the module is split into four 4K blocks (0 to 3) of 16 bits words
  3. extended 16 bits NUT instruction structure
    1. bits 15 to 13 must be set to zero
    2. bits 12 to 10 are for blocks switching
    3. bits 9 to 0 are for NUT instructions
  4. block switching is encoded in each 16 bits extended NUT instruction
    1. bit 12 set to 1 indicate to the module internal firmware/hardware to interpret bits 11 and 10
    2. bits 11 & 10 indicate the following: 00 = block 0, 01 = block 1, 10 = block 2, 11 = block 3
  5. bank switching can also be done with modified ENBANK instructions
    1. ENBANK1: 0x100 or 01 0000 0000 becomes 0001 0101 0000 0000 or 0x1500
    2. ENBANK2: 0x180 or 01 1000 0000 becomes 0001 1001 1000 0000 or 0x1980
    3. ENBANK3: 0x140 or 01 0100 0000 becomes 0001 1101 0100 0000 or 0x1D40 (not in the manual but can be extrapolated)
    4. ENBANK4: 0x1C0 or 01 1100 0000 (not in the manual and not supported)
  6. bank 1 even/lower page always contains 4K block 0
  7. bank 1 odd/higher page often contains 4K block 1 (at boot up, mode changes, etc)
  8. bank 1 odd/higher page is changed to the specified block (0 to 3) when the module encounters an instruction with block switching bits set
  9. bank 1 odd/higher page is changed to the specified block (1 to 3) when a modified ENBANK1 to ENBANK3 instruction is interpreted

ZEPROM module from Zengrange: (discontinued)
  1. ENBANK1 and ENBANK2 are supported(0x100, 0x180), ENBANK3 to ENBANK4 are not supported (0x140, 0x1C0)
    1. ENBANK1 activate the first 8K (even/odd pages)
    2. ENBANK2 activate the second 8K (even/odd pages)
  2. to convert a 16KB flat module to a bank switched one, they first link the even/odd pages and then remap the second 8K to bank 2.

MLDL2000 card reader module (firmware v1.51+) from Meindert Kuipers: (discontinued)
  1. support bank switching for all pages (0x0 to 0xF)
  2. even/odd pages are linked (0x4/0x5, 0x6/0x7, 0x8/0x9, 0xA/0xB, 0xC/0xD, 0xE/0xF)
  3. ENBANK1 to ENBANK4 are supported (0x100, 0x180, 0x140, 0x1C0)

Clonix & NoV modules from Diego Díaz:
  1. ENBANK1 to ENBANK4 are supported (0x100, 0x180, 0x140, 0x1C0) for Flash based pages only (NoV RAM pages does not support BS)
  2. support bank switching for pages 0x4 to 0xF
  3. before 2020: bank switching is done at module level (all the pages of all the ROMs served by the module are switched at the same time)
  4. since 2020: bank switching is done at page level

41CL boards from Monte Dalrymple:
  1. ENBANK1 to ENBANK4 are supported (aka ENROMx, 0x100, 0x180, 0x140, 0x1C0)
  2. page & bank mapping are done with the WCMD NEWT instruction and with the MMU (0x804xxx adresses)
  3. extended 16 bits NUT instruction structure
    1. bits 15 to 14 unused (ignored)
    2. bits 13 to 12 used for turbo handling (bits = this/next instruction)
      • 00 = turbo execute / turbo fetch (if enabled)
      • 01 = normal execute / normal fetch
      • 1x = refetch, normal execute / normal fetch
    3. bits 11 to 10 unused (ignored)
    4. bits 9 to 0 are for NUT instructions
  4. pages that are bank switch enabled
    1. even/odd port pages are linked (0x8/0x9, 0xA/0xB, 0xC/0xD, 0xE/0xF)
    2. some lower pages are standalone (0x4, 0x6, 0x7)
    3. some lower pages are linked (0x3/0x5)
      The 0x3/0x5 linking is required by the CX Extended Functions.
      The bank is switched by code in page 3 before a jump to code in page 5.
  5. OS pages are not bank switch enabled (0x0, 0x1, 0x2)

DM41X from SwissMicros:
  1. ENBANK1 to ENBANK4 are supported (0x100, 0x180, 0x140, 0x1C0)
  2. support bank switching for pages 0x4 to 0xF
  3. OS pages are not bank switch enabled (0x0, 0x1, 0x2, 0x3)
  4. MOD file control module page switch definition

edit 1: typos
edit 2: added products web link
edit 3: added missing items from Ángel
edit 4: added 41CL correction from Monte
Find all posts by this user
Quote this message in a reply
Post Reply 


Messages In This Thread
[41CL WARP] XEQ+ oddness - cdmackay - 04-05-2021, 08:41 PM
RE: [41CL WARP] XEQ+ oddness - cdmackay - 04-06-2021, 08:14 PM
RE: [41CL WARP] XEQ+ oddness - rprosperi - 04-06-2021, 09:04 PM
RE: [41CL WARP] XEQ+ oddness - cdmackay - 04-06-2021, 10:49 PM
RE: [41CL WARP] XEQ+ oddness - rprosperi - 04-07-2021, 12:58 AM
RE: [41CL WARP] XEQ+ oddness - cdmackay - 04-07-2021, 06:38 PM
RE: [41CL WARP] XEQ+ oddness - cdmackay - 04-07-2021, 10:15 PM
RE: [41CL WARP] XEQ+ oddness - cdmackay - 04-08-2021, 06:34 PM
RE: [41CL WARP] XEQ+ oddness - cdmackay - 04-08-2021, 10:57 PM
RE: [41CL WARP] XEQ+ oddness - cdmackay - 04-09-2021, 04:11 PM
RE: [41CL WARP] XEQ+ oddness - cdmackay - 04-10-2021, 12:00 AM
RE: [41CL WARP] XEQ+ oddness - cdmackay - 04-10-2021, 12:19 AM
RE: [41CL WARP] XEQ+ oddness - cdmackay - 04-10-2021, 12:33 AM
RE: [41CL WARP] XEQ+ oddness - cdmackay - 04-10-2021, 06:35 PM
RE: [41CL WARP] XEQ+ oddness - cdmackay - 04-10-2021, 06:43 PM
RE: [41CL WARP] XEQ+ oddness - rprosperi - 04-10-2021, 08:03 PM
RE: [41CL WARP] XEQ+ oddness - cdmackay - 04-10-2021, 09:16 PM
RE: [41CL WARP] XEQ+ oddness - cdmackay - 04-10-2021, 09:15 PM
RE: [41CL WARP] XEQ+ oddness - cdmackay - 04-10-2021, 06:45 PM
RE: [41CL WARP] XEQ+ oddness - rprosperi - 04-11-2021, 12:35 PM
RE: [41CL WARP] XEQ+ oddness - Sylvain Cote - 04-11-2021 02:12 PM
RE: [41CL WARP] XEQ+ oddness - rprosperi - 04-11-2021, 07:53 PM
RE: [41CL WARP] XEQ+ oddness - cdmackay - 04-11-2021, 09:39 PM
RE: [41CL WARP] XEQ+ oddness - rprosperi - 04-12-2021, 01:36 AM
RE: [41CL WARP] XEQ+ oddness - rprosperi - 04-12-2021, 12:29 PM
RE: [41CL WARP] XEQ+ oddness - cdmackay - 04-12-2021, 04:17 PM



User(s) browsing this thread: 1 Guest(s)