Assembler, but not at all

[Claudio L.]

(10-12-2023 03:31 AM)komame Wrote:  The same program implemented in PPL would look like this:

Code:

EXPORT LOOPS()
BEGIN
  LOCAL i;
  REPEAT
    i:=i+1;
  UNTIL 0;
END;

and after 60 seconds, the result is 2,950,000 (firmware 14730, tested just after soft reset). So, for one loop cycle, PPL requires 10738 CPU cycles.

...
EDIT: I forgot that I still have the G1, which primarily differs from the G2 in its CPU architecture (ARMv5 vs ARMv7) and the actual processor clock speed is just a little over 20% difference. In this test, the G1 [400MHz] scores as follows: 845,000 iterations / 28402 CPU cycles per one loop iteration (so it is worse than RPL on HP49G), which unfortunately confirms that under such conditions, RPL would probably take the lead (but this doesn't reflect well on RPL, it just reflects poorly on PPL).
...

NewRPL running this test on the Prime G1 did 1,878,000 in 60 seconds.