HP-48 FRAM Cards

[snrowe]

(07-23-2016 01:40 AM)Dave Frederickson Wrote:  

(07-23-2016 01:04 AM)snrowe Wrote:  Quote from article on page 3:
"A read operation in a FRAM is destructive because it requires switching the polarization state in order to sense its state. The read operation has to restore the polarization to its original state after the initial read which adds cycle time to the read operation."

Also page 6 the table states FRAM has a destructive read.

I see, in this case, "destructive read" has two different meanings. Magnetic core memory and FRAM employ a destructive read architecture where it's necessary to change the state of a bit in order to read the value. The original value then needed to be rewritten back. This is destructive in that the data is lost when read, but does not wear out the device. Core memory had no such characteristic. With respect to endurance, reading and writing reduces the lifetime of FRAM and flash, so one could say that FRAM is more destructive than flash because of the write-after-read architecture, but FRAM still has much better endurance. Does that help?

Just to clarify things a little more, it's not necessary to change the state of all the bits in order to read them. With core memory, and forgive me if I get the polarity incorrect as it's been a while, to read the data all ones are written to a register. A sense line then detects a pulse from the bits which were zeros and changed state. Then the zeros are written back.

Dave

Hi Dave,

The source of information on FRAM I read up on suggested the switching polarization of the FRAM bit was a wear out mechanism due to the motion of atoms required in doing so. I could not find any references that suggest what you're saying is correct, could you point me to a source that explains the read process doesn't "wear out" the memory?

Thanks in advance,
Scott