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HP-41C T register duplication disabling
02-19-2020, 06:16 PM
Post: #1
HP-41C T register duplication disabling
Good evening, I am sorry if this question was already asked (I found nothing) or if it is in the wrong section (I will try to change its position in this case).
My question is if it is possible to disable T register duplication on HP-41C because I don't need this feature and I find it a bit annoying. In the user manual I couldn't find any useful information. I am sorry for my english.
Ranieri
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02-19-2020, 08:34 PM
Post: #2
RE: HP-41C T register duplication disabling
(02-19-2020 06:16 PM)Ranieri Wrote:  Good evening, I am sorry if this question was already asked (I found nothing) or if it is in the wrong section (I will try to change its position in this case).
My question is if it is possible to disable T register duplication on HP-41C because I don't need this feature and I find it a bit annoying. In the user manual I couldn't find any useful information. I am sorry for my english.
Ranieri

Short answer: No.

Greetings,
    Massimo

-+×÷ ↔ left is right and right is wrong
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02-19-2020, 08:40 PM
Post: #3
RE: HP-41C T register duplication disabling
(02-19-2020 08:34 PM)Massimo Gnerucci Wrote:  
(02-19-2020 06:16 PM)Ranieri Wrote:  Good evening, I am sorry if this question was already asked (I found nothing) or if it is in the wrong section (I will try to change its position in this case).
My question is if it is possible to disable T register duplication on HP-41C because I don't need this feature and I find it a bit annoying. In the user manual I couldn't find any useful information. I am sorry for my english.
Ranieri

Short answer: No.

Grazie
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02-20-2020, 04:53 PM
Post: #4
RE: HP-41C T register duplication disabling
It's an interesting question. Suppose it was possible to disable T register duplication. What would you put in the T register instead?

In other words, suppose you key in
1 ENTER
2 ENTER
3 ENTER
4 +

What would you want the stack to contain?
T: ?
Z: 1
Y: 2
X: 7

Dave
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02-20-2020, 05:06 PM
Post: #5
RE: HP-41C T register duplication disabling
(02-19-2020 06:16 PM)Ranieri Wrote:  Good evening, I am sorry if this question was already asked (I found nothing) or if it is in the wrong section (I will try to change its position in this case).
My question is if it is possible to disable T register duplication on HP-41C because I don't need this feature and I find it a bit annoying. In the user manual I couldn't find any useful information. I am sorry for my english.
Ranieri

It's a fundamental feature of all the HP RPN calculators with a fixed size stack. There are other HP calculators ("RPL" calculators such as HP 28/48/49/50 series and HP Prime in RPN mode) that have a stack that grows and shrinks with no duplication of the "top" element.

— Ian Abbott
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02-20-2020, 06:28 PM
Post: #6
RE: HP-41C T register duplication disabling
(02-20-2020 04:53 PM)David Hayden Wrote:  It's an interesting question. Suppose it was possible to disable T register duplication. What would you put in the T register instead?

In other words, suppose you key in
1 ENTER
2 ENTER
3 ENTER
4 +

What would you want the stack to contain?
T: ?
Z: 1
Y: 2
X: 7

Dave

Thank you for your reply, probably I would expect it to contain 0 just like the other registers.
Ranieri
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02-20-2020, 06:53 PM
Post: #7
RE: HP-41C T register duplication disabling
(02-20-2020 06:28 PM)Ranieri Wrote:  
(02-20-2020 04:53 PM)David Hayden Wrote:  It's an interesting question. Suppose it was possible to disable T register duplication. What would you put in the T register instead?

In other words, suppose you key in
1 ENTER
2 ENTER
3 ENTER
4 +

What would you want the stack to contain?
T: ?
Z: 1
Y: 2
X: 7

Dave

Thank you for your reply, probably I would expect it to contain 0 just like the other registers.
Ranieri

That's how some other old RPN machines work. For instance on the Novus Mathematician, when you clear (drop) the x-element, the stack goes down and the top element is cleared. Almost like the RPL (although the Novus stack was *3* elements high).
Novus as a RPL precursor?

J-F
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02-20-2020, 07:01 PM
Post: #8
RE: HP-41C T register duplication disabling
(02-20-2020 06:28 PM)Ranieri Wrote:  Thank you for your reply, probably I would expect it to contain 0 just like the other registers.
You could do a CLST (Clear Stack) to put 0 into X, Y, Z & T
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02-20-2020, 09:03 PM
Post: #9
RE: HP-41C T register duplication disabling
I'm not sure it makes any difference. Uninitialized registers or variables, whether they contain 0 or any random value, will lead to problems either way. I have however seen instruction sequences that take advantage of the fact that T gets duplicated as the stack drops.

http://WilsonMinesCo.com (Lots of HP-41 links at the bottom of the links page, http://wilsonminesco.com/links.html )
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02-21-2020, 08:03 AM (This post was last modified: 02-21-2020 08:04 AM by AndiGer.)
Post: #10
RE: HP-41C T register duplication disabling
E.g. there is a simple but very useful memory test program for HP97 and HP67 that makes use of the T register being duplicated:
https://www.hpmuseum.org/cgi-sys/cgiwrap...ead=129900
OK, were are talking about HP41 in this thread...
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02-21-2020, 01:49 PM
Post: #11
RE: HP-41C T register duplication disabling
(02-20-2020 09:03 PM)Garth Wilson Wrote:  I have however seen instruction sequences that take advantage of the fact that T gets duplicated as the stack drops.

One of them is the evaluation of polynomomial expressions using the Horner method.
Quoting from the HP-15C manual, pages 79 and 80:

----------------------------------------------------------------------------------

Polynomial Expressions and Horner's Method

Some expressions, such as polynomials, use the same variable several times for their solution.
For example, the expression

f(x) = Ax⁴ + Bx³ + Cx² + Dx + E

uses the variable x four different times. A program to solve such an equation could repeatedly 
recall a stored copy of x from a storage register. A shorter programming method, however, 
would be to use a stack which has been filled with the constant (refer to Loading the Stack 
with a Constant, page 41).

Horner's Method is a useful means of rearranging polynomial expressions to cut calculation 
steps and calculation time. It is especially expedient in SOLVE and ∫x,y, two rather long-running 
functions that use subroutines.

This method involves rewriting a polynomial expression in a nested fashion to eliminate 
exponents greater than 1:

Ax⁴ + Bx³ + Cx² + Dx + E
(Ax³ + Bx² + Cx + D)x + E
((Ax² + Bx + C)x + D)x + E
(((Ax + B)x + C)x + D)x + E


Example: Write a program for 5x⁴ + 2x³ as (((5x + 2)x)x)x, then evaluate for x = 7

Keystrokes        Display

g P/R               000-                    Assumes position in memory
                                            is line 000. If it is not, clear
                                            program memory.

f LBL B             001-42,21,12            
5                   002-       5
*                   003-      20            5x
2                   004-       2      
+                   005-      40            5x + 2.
*                   006-      20            (5x + 2)x.
*                   007-      20            (5x + 2)x².
*                   008-      20            (5x + 2)x³.
g RTN               009-   43 32         
g PR                                        Return to Run mode. Prior
                                            result remains in display
7 ENTER ENTER
ENTER               7.0000                  Loads the stack (X-, Y-, Z-,
                                            and T- registers) with 7.
f B                 12,691.000

----------------------------------------------------------------------------------           
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02-21-2020, 02:28 PM
Post: #12
RE: HP-41C T register duplication disabling
Here's an interesting challenge - one I'm not sure I have a good solution for yet: what's the fewest number of steps needed to guarantee that the value in T is different from the value in Z, while preserving the contents of X, Y, Z, and L?
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02-21-2020, 02:33 PM
Post: #13
RE: HP-41C T register duplication disabling
(02-21-2020 02:28 PM)Dave Britten Wrote:  Here's an interesting challenge - one I'm not sure I have a good solution for yet: what's the fewest number of steps needed to guarantee that the value in T is different from the value in Z, while preserving the contents of X, Y, Z, and L?
STO T // copy X in T and satisfy your request. Wink
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02-21-2020, 02:34 PM
Post: #14
RE: HP-41C T register duplication disabling
(02-21-2020 02:33 PM)Sylvain Cote Wrote:  
(02-21-2020 02:28 PM)Dave Britten Wrote:  Here's an interesting challenge - one I'm not sure I have a good solution for yet: what's the fewest number of steps needed to guarantee that the value in T is different from the value in Z, while preserving the contents of X, Y, Z, and L?
STO T // copy X in T and satisfy your request. Wink

Not if X=Z, though. Then you still have T=Z.
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02-21-2020, 03:27 PM
Post: #15
RE: HP-41C T register duplication disabling
(02-21-2020 02:34 PM)Dave Britten Wrote:  
(02-21-2020 02:33 PM)Sylvain Cote Wrote:  
(02-21-2020 02:28 PM)Dave Britten Wrote:  Here's an interesting challenge - one I'm not sure I have a good solution for yet: what's the fewest number of steps needed to guarantee that the value in T is different from the value in Z, while preserving the contents of X, Y, Z, and L?
STO T // copy X in T and satisfy your request. Wink
Not if X=Z, though. Then you still have T=Z.
He! Ho! you are cheating Wink that constraint was not in the original request. LOL
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02-21-2020, 03:44 PM
Post: #16
RE: HP-41C T register duplication disabling
(02-21-2020 03:27 PM)Sylvain Cote Wrote:  
(02-21-2020 02:34 PM)Dave Britten Wrote:  Not if X=Z, though. Then you still have T=Z.
He! Ho! you are cheating Wink that constraint was not in the original request. LOL

That's an edge case, not a constraint. Wink Simply guarantee that T does not equal Z, and leave X, Y, Z, and L as you found them. There are lots of edge cases for this - zeroes, alpha data, etc. - that make this a good deal trickier than it seems at first.
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02-25-2020, 09:01 AM (This post was last modified: 02-25-2020 09:03 AM by Didier Lachieze.)
Post: #17
RE: HP-41C T register duplication disabling
(02-21-2020 02:28 PM)Dave Britten Wrote:  Here's an interesting challenge - one I'm not sure I have a good solution for yet: what's the fewest number of steps needed to guarantee that the value in T is different from the value in Z, while preserving the contents of X, Y, Z, and L?

Here is a program for the HP 41 /42S that should meet this challenge. With 15 steps it’s not very short and I’m looking to the RPN experts on this forum for better solutions.

Code:
00 { 28-Byte Prgm }
01▸LBL "T<>Z"
02 X<> ST Z
03 STO ST T
04 SF 25
05 X=0?
06 CLX
07 X≠0?
08 GTO 01
09 CLX
10 1
11▸LBL 01
12 +/-
13 X<> ST T
14 X<> ST Z
15 END


Attached File(s)
.zip  T#Z.zip (Size: 142 bytes / Downloads: 1)
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02-25-2020, 09:47 AM (This post was last modified: 02-25-2020 09:52 AM by Werner.)
Post: #18
RE: HP-41C T register duplication disabling
I wonder what the use is, but here goes
works even when Z and/or T contains string data or complex numbers.

1. keeping T intact if it was different from Z to start with
Code:
>LBL "T#Z"
 X<> ST Z
 R^
 X=Y?
 CLX
 X=Y?
 ISG ST X
 X#Y?
 Rv
 X<> ST Z
 END

2. destroying T
Code:
>LBL "T#Z"
 PI
 R^
 X=Y?
 STO- ST Y
 Rv
 Rv
 END

Cheers, Werner

41CV†,42S,48GX,49G,DM42,DM41X,17BII,15CE,DM15L,12C,16CE
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02-25-2020, 10:10 AM
Post: #19
RE: HP-41C T register duplication disabling
These functions are included in Angel's WarpCore module for the 41, written in MCode. You can for example exchange T and Z, or compare T to Z, in a single instruction.

http://WilsonMinesCo.com (Lots of HP-41 links at the bottom of the links page, http://wilsonminesco.com/links.html )
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02-25-2020, 03:26 PM
Post: #20
RE: HP-41C T register duplication disabling
(02-25-2020 09:47 AM)Werner Wrote:  I wonder what the use is

There isn't any, other than brain exercise. Smile
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