Threaded Mode | Linear Mode

Dave Britten · (This post was last modified: 05-23-2015 10:42 PM by Dave Britten.)

You don't really come to appreciate recall arithmetic (RCL+, RCL-, etc.) until you have to write programs for a machine that doesn't have it. I learned that pretty quickly last week with the 41CV. Sometimes avoiding that one stack lift can make all the difference.

Out of curiosity/boredom, I went through the comparison tool on this site eight models at a time to see which have it and which don't. I was going to make two lists, the haves and have-nots, but it turns out so few models have the feature, that it's hardly worth listing the ones that don't.

Have recall arithmetic:
15C (including LE)
27
32S
32SII
42S
45
46
WP-34S

The RPL models don't really need it, since they don't need to worry about stack overflow.

Can anybody confirm that the 33S, 35S, and WP-34S have recall arithmetic? I'm pretty sure they all do, but can't remember for certain.

Anything else missing?

Paul Dale · 05-23-2015, 10:37 PM

The WP34S has.

- Pauli

Dave Britten · 05-23-2015, 10:42 PM

(05-23-2015 10:37 PM)Paul Dale Wrote: The WP34S has.

- Pauli

Thought so. Didn't want to come inside the house, go upstairs, and get it to test. Smile

Thanks.

**Katie Wasserman** · 05-23-2015, 11:20 PM

(05-23-2015 10:10 PM)Dave Britten Wrote: Anything else missing?

The 9815 can do recall register arithmetic but only using register 000. This is pretty weird in that the reference to 000 is implied. So, 5 STO 000, CLEAR, 3 RCL x will result in 15.

Garth Wilson · 05-23-2015, 11:36 PM

(05-23-2015 10:10 PM)Dave Britten Wrote: You don't really come to appreciate recall arithmetic (RCL+, RCL-, etc.) until you have to write programs for a machine that doesn't have it. I learned that pretty quickly last week with the 41CV. Sometimes avoiding that one stack lift can make all the difference.

You can get it on the 41 now too, with Ángel Martin's new Total Rekall module. http://hpmuseum.org/forum/thread-3738.html

Steve Simpkin · 05-24-2015, 12:22 AM

The 33S and 35S also have recall arithmetic.

PANAMATIK · 05-24-2015, 01:14 AM

It is interesting, that the non programmables HP-45, HP-27 does have recall arithmetics, and the programmables HP-55,HP-65,HP-97,HP-25,HP-29C don't have it.

The reason for it is, that the necessary one byte opcodes for program steps were not available. RAM space was very precious and program steps were coded as one byte to get a maximum of 98 steps (HP-29C) or 224 steps (HP-97) from the RAM chips. The storage arithmetics in HP-29C needs 64 opcodes of 256 possible, and the recall arithmetics would have needed another 64 opcodes, which were not there.

see the list of program step opcodes http://panamatik.de/ProgramCodes.pdf.

The later generation programmables HP-32S, HP-42S used at least >8 bit opcodes to solve this problem.

Bernhard

Paul Dale · 05-24-2015, 01:27 AM

The 25 has the opcode space for recall arithmetic.

Pauli

Dave Britten · 05-24-2015, 02:25 AM

(05-24-2015 01:27 AM)Paul Dale Wrote: The 25 has the opcode space for recall arithmetic.

Pauli

It does have the space, but I wonder if the way instructions are decoded and executed limited them. Note how all the GTO and STO instructions tend to be aligned in such a way that looks like it was intended to ease decoding the address. Perhaps there wasn't enough ROM space to handle more complex address decoding for recalls, or just not enough ROM space to handle any recall arithmetic period.

If it's an alignment issue, one has to wonder why they wouldn't have just moved other instructions around, though. Anybody have any insights into this from looking at a 25 ROM disassembly?

PANAMATIK · (This post was last modified: 05-24-2015 09:29 PM by PANAMATIK.)

(05-24-2015 01:27 AM)Paul Dale Wrote: The 25 has the opcode space for recall arithmetic.

Pauli

I agree. It could have been used 0x80-0x87, 0x8D-0xFD, 0x8E-0xFE, 0x8F-0xFF

(05-24-2015 02:25 AM)Dave Britten Wrote: If it's an alignment issue, one has to wonder why they wouldn't have just moved other instructions around, though. Anybody have any insights into this from looking at a 25 ROM disassembly?

Yes, the HP-25 disassembly shows, that the 2k ROM is fully occupied and size optimized as far as possible. The program step opcode decoding uses indirectly addressed jump tables called by the a-> rom address instruction.

Code:

    0100001010                    execut: 0 -> c[xs]                

    0010101110                            c -> a[x ]                

    0110101010                            a + 1 -> a[xs]            

    0010010000                            a -> rom address

As an example see the jump tables located at 02000: ff.
2000: decodes 0xF0-0xFF
2020: decodes 0xE0-0xEF
2040: decodes 0xD0-0xDF

As you can see the opcodes 0xED,0xEF, 0xDD-0xDF are not decoded but were used for go to destinations of other opcodes ( qenter: 1/x: ).

Code:

    0111011111                    q0:0:   go to minus               

    1000011111                            go to plus                

    0111110011                            go to time                

    1100101011                            go to div0                

    0000100000                            select rom 0              

    1000010111                            go to qr/s                

    0001110111                            go to qenter              

    0000100000                            select rom 0              

    0000100000                            select rom 0              

    1101000011                            go to qclx                

    1101011011                            go to qxexy               

    1101110011                            go to qroll               

    1010101011                            go to sig+                

    1110101111                            go to erro                

    1110101111                            go to erro                

    1110101111                            go to erro                

    1001000100                    q1:0:   1 -> s f      9           

    1100010111                            go to x>=0                

    1001000100                            1 -> s f      9           

    1001111011                            go to x=0                 

    1010011111                            go to pi                  

    1110001011                            go to qthru1              

    1110101111                            go to erro                

    0110110010                            a + 1 -> a[s ]            

    0110110010                            a + 1 -> a[s ]            

    1111100011                            if n/c go to rad          

    0101101111                            go to percen              

    0010110111                            go to 1/x                 

    1110001011                            go to qthru1              

    1011001000                    qenter: c -> stack                

    0010001100                    qent1:  0 -> s push   2           

    1110001011                            go to qthru1              

    1001000100                    q2:0:   1 -> s f      9           

    1100001011                            go to x>=y                

    1001000100                            1 -> s f      9           

    1001110011                            go to x=y                 

    1101111011                            go to lastx               

    1010010111                            go to pause               

    1110101111                            go to erro          

    1110101111                            go to erro                

    1110110111                            go to qclrrg              

    1100111111                            go to qclr                

    1001010111                            go to mean                

    0011100011                            go to stddev              

    1000100111                            go to sig-                

    0000011010                    1/x:    0 -> a[w ]                

    0110100010                            a + 1 -> a[p ]            

    1100101111                            if n/c go to div1

Besides executing the recall arithmetic, there would have been needed 4 more jump tables and better decoding. I'm sure they were thinking about it and couldn't get the ROM space.

Bernhard

Ángel Martin · (This post was last modified: 05-24-2015 08:55 AM by Ángel Martin.)

(05-23-2015 11:36 PM)Garth Wilson Wrote:
(05-23-2015 10:10 PM)Dave Britten Wrote: You don't really come to appreciate recall arithmetic (RCL+, RCL-, etc.) until you have to write programs for a machine that doesn't have it. I learned that pretty quickly last week with the 41CV. Sometimes avoiding that one stack lift can make all the difference.

You can get it on the 41 now too, with Ángel Martin's new Total Rekall module. http://hpmuseum.org/forum/thread-3738.html

I was going to say that but Garth beat me ;-)

Yes the Total_Rekall_2015 removed that thorn in the side - finally the 41 is within the "haves" group. And sure it does make a difference sometimes when the stack is fully used up.

BTW it also adds RCL^ to the list of arithmetic operations - perhaps the only one out there.

Cheers,
'AM

Paul Dale · 05-24-2015, 09:12 AM

(05-24-2015 08:45 AM)Ángel Martin Wrote: BTW it also adds RCL^ to the list of arithmetic operations - perhaps the only one out there.

Walter didn't let me include STO^ and RCL^...

Pauli

Dieter · 05-24-2015, 12:14 PM

(05-24-2015 09:12 AM)Paul Dale Wrote: Walter didn't let me include STO^ and RCL^...

On the other hand there is STO↓ and STO↑ as well as RCL↓ and RCL↑.
And after a few years of 34s programming I now have used one of these for the first time. ;-)

Pauli

bshoring · 05-24-2015, 07:59 PM

(05-24-2015 01:14 AM)PANAMATIK Wrote: It is interesting, that the non programmables HP-45, HP-27 does have recall arithmetics, and the programmables HP-55,HP-65,HP-97,HP-25,HP-29C don't have it.

The reason for it is, that the necessary one byte opcodes for program steps were not available. RAM space was very precious and program steps were coded as one byte to get a maximum of 98 steps (HP-29C) or 224 steps (HP-97) from the RAM chips. The storage arithmetics in HP-29C needs 64 opcodes of 256 possible, and the recall arithmetics would have needed another 64 opcodes, which were not there.

see the list of program step opcodes http://panamatik.de/ProgramCodes.pdf.

The later generation programmables HP-32S, HP-42S used at least >8 bit opcodes to solve this problem.

Bernhard

Thanks, Bernhard, for explaining this. I had long wondered why such a useful function was not included on the early programmables. It is probably the same reason that storage arithmetic is limited to the first few registers on some financials, like the 12C.

Thanks,
Bob

Dieter · 05-24-2015, 08:52 PM

(05-24-2015 07:59 PM)bshoring Wrote: It is probably the same reason that storage arithmetic is limited to the first few registers on some financials, like the 12C.

This is not a special feature of the financial calculations, it's the same on several scientifics. For instance, on the 34C storage arithmetics is limited to registers 0...9, while it is not available on registers ,0...,9 and the I register. Then think of the 67 and 97: storage arithmetics is limited to the first ten registers. Accessing the next ten (even simple STO and RCL) requires switching via P<>S. The remaining six registers A–E and I also do not support storage arithmetics.

Dieter

PANAMATIK · (This post was last modified: 06-19-2015 05:24 PM by PANAMATIK.)

(05-24-2015 08:52 PM)Dieter Wrote: .... on the 34C storage arithmetics is limited to registers 0...9, while it is not available on registers ,0...,9 and the I register.....

Today I was able to add the HP-34C opcode table to my ProgramCodes.pdf document.

You can see that the HP-34C uses up all 256 possible opcodes except one for coding its program steps. The engineers choose carefully which are the most important functions. The SOLVE and Integral function uses only 6 of 12 labels. And as already mentioned, storage arithmetic can be done only with the ten primary registers.

The most interesting part is to see, that f SCI 8,9 and f ENG 8,9 are not programmable. Only SCI 0-7 and ENG 0-7 are present, because the table would have overflown. If you try to program one of these display formats, it will be replaced by SCI 7 ENG 7, which is also mentioned in the manual. The more important f FIX 0-9 however is fully programmable.

Even with the reduced registers 0-9, storage arithmetic uses 44 of 255 opcodes. Recall arithmetic would have needed another 44 opcodes.

Due to this space limitation, the HP-34C was probably the last and ultimate model, which used the one byte program step coding. I'm not sure whether the voyager models had already two bytes. Does anybody know?

Bernhard

Dwight Sturrock · 06-19-2015, 06:09 PM

I never noticed the 34C or 15C recall arithmetic until I started using the 42S and started writing really long or complex programs. I was surprised a few years back when I discovered the 15C has it.

It really is the icing on the cake for RPN. And it's hard to do without it once you begin to use it. What's strange is the 15C has it, 41C doesn't, and the 42S does.

Dave Britten · 06-19-2015, 06:29 PM

(06-19-2015 06:09 PM)Dwight Sturrock Wrote: I never noticed the 34C or 15C recall arithmetic until I started using the 42S and started writing really long or complex programs. I was surprised a few years back when I discovered the 15C has it.

It really is the icing on the cake for RPN. And it's hard to do without it once you begin to use it. What's strange is the 15C has it, 41C doesn't, and the 42S does.

The 15C came after the 41C, and had a few features the 41 didn't. Matrices, solver, integration, etc. The Advantage module adds a lot of 15C features (and some from the 16C and 12C), but recall arithmetic isn't one of them.

Fortunately, you can emulate it easily enough. RCL- n becomes X<> n, STO- n, X<> n. I think that would work with indirect addressing, too; don't have my 41 with me at the moment to test. (Which models do indirect recall arithmetic? Probably the 42S at least, I would imagine, and the 32S family via (i).)

Marcus von Cube · 06-19-2015, 07:23 PM

(06-19-2015 06:29 PM)Dave Britten Wrote: (Which models do indirect recall arithmetic? Probably the 42S at least, I would imagine, and the 32S family via (i).)

Not a genuine HP, but the WP 34S does it.

[kby] · 05-22-2019, 09:33 AM

(05-24-2015 01:14 AM)PANAMATIK Wrote: It is interesting, that the non programmables HP-45, HP-27 does have recall arithmetics, and the programmables HP-55,HP-65,HP-97,HP-25,HP-29C don't have it.

The reason for it is, that the necessary one byte opcodes for program steps were not available. RAM space was very precious and program steps were coded as one byte to get a maximum of 98 steps (HP-29C) or 224 steps (HP-97) from the RAM chips. The storage arithmetics in HP-29C needs 64 opcodes of 256 possible, and the recall arithmetics would have needed another 64 opcodes, which were not there.

see the list of program step opcodes http://panamatik.de/ProgramCodes.pdf.

The later generation programmables HP-32S, HP-42S used at least >8 bit opcodes to solve this problem.

Bernhard

Can’t really buy that explanation for the -65. Storage arithmetic is not merged so it would not be odd to have recall arithmetic unmerged.