Warning
With the release of the FRAM71B this article is out-of-date and need to be revisited.
I am currently doing a 41CL project and will update this article when the other project is completed.
I strongly suggest to read the
FRAM71B thread to get the latest information.
Goal
The goal of this procedure, is to give an example of what are the steps involved in order to create a configuration of intermediate complexity.
A good idea would be to follow the
FRAM71 Initialization procedure before doing this one.
Background
This configuration will install the following modules:
* HP41 Translator ROM (16KB+32KB)
* Math ROM (32KB)
* JPC ROM (32KB)
* Backup space (32KB)
* ROM space (32KB) [will contains FRAM71 ToolKit for the duration of this procedure]
* Additional main RAM (160KB)
Revisions
2017-01-24 Out of date warning
2015-11-08 Added "Disclaimer" & formatting adjustments.
2015-11-05 Officially released & cosmetic corrections
2015-11-04 Beta version
2015-11-03 Alpha version
Acknowledgments
I would like to thank ...
Hans Brüggemann for making this fantastic module.
Dave Frederickson for having done the very helpful FRAM71 Toolkit (FRAM71TK).
Robert Prosperi and Dave Frederickson for their continuous support.
Geoff Quickfall for his patience in my lateness to finish his FRAM71 module configuration.
Disclaimer
This procedure was done in good faith.
I do not offer any warranty of any kind.
If you follow this procedure as written, it should work.
If not, send me a PM, or better, post a message in the forum and I will help you, within the limit of my knowledge of course.
Hardware & Software
HP-71B HandHeld Computer (Tested on firmware 1BBBB and 2CDCC)
FRAM71 Module (Hardware: v104 / Firmware: 511)
HP-82401A HP-IL Module (1A or 1B)
PIL-Box (1.5 or greater)
ILPeripherals Simulator [ILPer] (1.52 or greater)
FRAM71 ToolKit [FRAM71TK.LIF] (1.1b or greater)
ROM Images #1 [71ROM1V2.LIF] (v2, presently missing, I have to get the authorization before releasing it)
ROM Images #2 [71ROM2V2.LIF] (v2, presently missing, I have to get the authorization before releasing it)
ROM Images #3 [71ROM3V2.LIF] (v2, presently missing, I have to get the authorization before releasing it)
ROM Images #1 Content : HP-71B OS & IL (ROM/DUMP, 700KB Image)
Code:
NAME S TYPE LEN DATE TIME DESCRIPTION
---------- - ----- ----- -------- ----- ----------------------------------------
ROMCOPY LEX 1727 10/18/15 17:13 ROM Image Loader
HPIL1B ROM 16384 01/03/00 02:03 82401A HP-IL Interface rev. 1B
HPIL1A ROM 16384 01/03/00 02:06 82401A HP-IL Interface rev. 1A
OS1AAAAD BASIC 172 01/03/00 03:28 1AAAA Main ROM Dump Creator
OS1AAAA TEXT 0K 01/03/00 03:17 1AAAA Main ROM Dump File (missing)
OS1AAAAL BASIC 159 01/03/00 03:31 1AAAA Main ROM Dump Loader
OS1BBBBD BASIC 172 01/03/00 03:17 1BBBB Main ROM Dump Creator
OS1BBBB TEXT 135K 01/03/00 03:17 1BBBB Main ROM Dump File
OS1BBBBL BASIC 159 01/03/00 03:25 1BBBB Main ROM Dump Loader
OS2CCCCD BASIC 172 01/03/00 03:29 2CCCC Main ROM Dump Creator
OS2CCCC TEXT 0K 01/03/00 03:17 2CCCC Main ROM Dump File (missing)
OS2CCCCL BASIC 159 01/03/00 03:31 2CCCC Main ROM Dump Loader
OS2CDCCD BASIC 172 01/03/00 03:29 2CDCC Main ROM Dump Creator
OS2CDCC TEXT 135K 01/03/00 03:17 2CDCC Main ROM Dump File (coming soon)
OS2CDCCL BASIC 159 01/03/00 03:31 2CDCC Main ROM Dump Loader
ROM Images #2 Content : HP Application (ROM/LEX/DUMP, 700KB Image)
Code:
NAME S TYPE LEN DATE TIME DESCRIPTION
---------- - ----- ----- -------- ----- ----------------------------------------
ROMCOPY LEX 1727 10/18/15 17:13 ROM Image Loader
AMPISTAT ROM 32768 01/02/00 22:44 82489A AMPI Statistics Pac
CURVEFIT ROM 32768 01/02/00 22:56 82484A Curve Fitting Pac
DATACOMM ROM 16384 01/02/00 23:01 82488A Data Comms Pac
DEMO71 ROM 16384 10/18/15 20:17 Demo Module
DIAG71 TEXT 135K 10/18/15 20:19 Diagnostic Module (Dump File)
DIAG71LD BASIC 158 10/18/15 20:22 Diagnostic Module (Dump Loader)
CIRCUIT ROM 16384 10/18/15 20:35 82481A Circuit Analysis Pac
FINANCE ROM 16384 10/18/15 20:36 82482A Finance Pac
FORTHLDR BASIC 160 10/18/15 21:09 82441A FORTH Assembler ROM (Dump Loader)
FORTHDMP TEXT 67840 10/18/15 21:11 82441A FORTH Assembler ROM (Dump HC)
FORTHROM ROM 16384 10/18/15 21:12 82441A FORTH Assembler ROM
FTH41LDR BASIC 160 10/18/15 21:15 82490A HP41 Translator Pac (Dump Loader)
FTH41DMP TEXT 67840 10/18/15 21:16 82490A HP41 Translator Pac (Dump HC)
FTH41ROM ROM 16384 10/18/15 21:17 82490A HP41 Translator Pac SC
MATHLEX LEX 27682 10/18/15 21:22 82480A Math Pac (alt.version)
MATHROM ROM 32768 10/18/15 21:28 82480A Math Pac
SURVEY ROM 16384 10/18/15 21:30 82483A Surveying Pac
TEXTEDIT ROM 16384 10/18/15 21:30 82485A Text Editor Pac
ROM Images #3 Content - Third Party (ROM/LEX/DUMP, 700KB Image)
Code:
NAME S TYPE LEN DATE TIME DESCRIPTION
---------- - ----- ----- -------- ----- ----------------------------------------
ROMCOPY LEX 1727 10/18/15 17:13 ROM Image Loader
CMTTOOLS ROM 32768 10/18/15 21:37 CMT EPROM Tools
DATAMGMT ROM 32768 10/18/15 21:38 Data Management
JPCE01 ROM 32768 10/18/15 21:39 Journal Paris Chapter ROM Rev. E01
JPCF01 ROM 32768 10/18/15 21:40 Journal Paris Chapter ROM Rev. F01
JPCF04 LEX 25992 10/18/15 21:41 Journal Paris Chapter ROM Rev. F04
ZENWAND ROM 16384 10/18/15 21:43 Zengrange Wand
Procedure
Finally, the configuration procedure.
Reset FRAM71
Deactivate FRAM71 modules from memory.
Assumed jumpers configuration
Code:
Description Jumper settings
---------------------- --------------------------------------------------------
Disable SysRAM [J1: Open] & [J2: Close]
Disable E0000 Mapping [CN2-5: Open]
Disable SysRAM Writing [CN2-4: Open]
Enable HPBus Writing [CN2-3: Open]
Enable IRAM Mapping [CN2-2: Open]
Select FRAM Chip [CN2-1: Open=Bottom_512KB / Close=Top_512KB]
Unmap FRAM71 memory
Code:
POKE "2C000","00000000000000000000000000000000" [ENTER] -> remove FRAM71 memory from the memory map
[OFF] [ON] -> Activate the configuration
MEM [ENTER] -> You should have more than 16000 bytes (16.5KB)
HP-IL Configuration
Setup HP-IL, ILPer and load FRAM71TK virtual tape/floppy.
Connect all the components:
Code:
HPIL: 71B+IL <-> IL Cables <-> PIL-Box
USB: PIL-Box <-> USB Cable <-> PC/Win <-> ILPer
ILPer: start and configure software
Code:
* Start ILPer.exe software
* Match the "PIL-Box Link" control with the COM port the PIL-Box is using
* Fill the "Mass Storage LIF file" with the LIF image: FRAM71TK.LIF
* Check the Scope check box to activate IL commands tracing
* Press the Start Button
HP71B: activate interface loop
Code:
[ON] -> You may see some text in ILPer Scope
RESTORE IO [ENTER] -> You should see some text in ILPer Scope
ILPer: deactivate tracing
Code:
* Uncheck the Scope check box to deactivate IL commands tracing, loop integrity has been validated
Initial configuration (HC-T41/SC-T41/MATH/JPC/LEX/IRAM)
The following steps will create the foundation upon we will build the final setup.
Before Configuration
Code:
Chip_# Addr. Configuration Description LCIM Type Size Port
------ ----- ------------- -------------------------- ---- ----- ---- ----
nothing is mapped
Configuration
Code:
POKE "2C000","93A49596979800" [ENTER] -> Starting setup
[OFF] [ON] -> Activate the configuration
MEM [ENTER] -> You should have around 197KB
After Configuration
Code:
Chip_# Addr. Configuration Description LCIM Type Size Port
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_0 2C000 CONF 9
Chip_0 2C001 F-BLOCK 3 HC E0000 T41 ROM (planned) 1 RAM 32 5.00
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_1 2C002 CONF A
Chip_1 2C003 F-BLOCK 4 16KB SC T41 ROM (planned) 1 RAM 16 5.01
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_2 2C004 CONF 9
Chip_2 2C005 F-BLOCK 5 32KB Math ROM (planned) 1 RAM 32 5.02
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_3 2C006 CONF 9
Chip_3 2C007 F-BLOCK 6 32KB JPC ROM (planned) 1 RAM 32 5.03
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_4 2C008 CONF 9
Chip_4 2C009 F-BLOCK 7 32KB Backup (planned) 1 RAM 32 5.04
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_5 2C00A CONF 9
Chip_5 2C00B F-BLOCK 8 32KB FRAM71TK (planned) 1 RAM 32 5.05
------ ----- ------------- -------------------------- ---- ----- ---- ----
Install FRAM71 ToolKit
The following steps will install the FRAM71 ToolKit who is essential for installing the HP-41 Translator Module.
Before Configuration
Code:
Chip_# Addr. Configuration Description LCIM Type Size Port
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_5 2C00A CONF 9
Chip_5 2C00B F-BLOCK 8 32KB FRAM71TK (planned) 1 RAM 32 5.05
Configuration
Code:
FREE PORT(5.05) [ENTER] -> Create an IRAM for FRAM71 ToolKit
COPY ROMCOPY:TAPE [ENTER] -> Load the ROMCOPY LEX
ROMCOPY FRAMTK:TAPE TO :PORT(5.05) [ENTER] -> Load FRAM71 ToolKit into IRAM
VER$ [ENTER] -> HP71:1BBBB RCPY:E HPIL:1B RCPY:E
PURGE ROMCOPY [ENTER] -> Remove ROMCPY located in main RAM
VER$ [ENTER] -> HP71:1BBBB HPIL:1B RCPY:E
After Configuration
Code:
Chip_# Addr. Configuration Description LCIM Type Size Port
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_5 2C00A CONF 9
Chip_5 2C00B F-BLOCK 8 32KB FRAM71TK IRAM (done) 1 RAM 32 5.05
Load HC-TRANS41
Load the hidden part of the HP41 Translator ROM
Before Configuration
Code:
Chip_# Addr. Configuration Description LCIM Type Size Port
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_0 2C000 CONF 9
Chip_0 2C001 F-BLOCK 3 HC E0000 T41 ROM (planned) 1 RAM 32 5.00
Load HC-TRANS41 image file
Code:
RUN MEMBUF [ENTER] -> Port Dev Seq Size Addr Type Comment
-> 5 0 0 32 30000 0 HC TRANS41 ROM
RUN T2R [ENTER] -> Copy HC Trans41 32KB image to 30000
-> You will see 3FFC0 when the program has ended
Remap C0000-CFFFF to E0000-EFFFF
Code:
[ON] [ON] [OFF] -> Shut down the computer
Insert Jumper CN2‐5 -> Activate Chip_0 E0000 mapping
[ON] -> Wake up the computer
Validate E0000-EFFFF content
Code:
PEEK$("E0000",16) [ENTER] -> "0600EF550EDA21EA" validate HC TRANS41 content
PEEK$("EFBF0",16) [ENTER] -> "03ED03EE03EF03F0" validate HC TRANS41 content
Reconfigure IRAM into ROM
Code:
POKE "2C000","D3A49596979800" [ENTER] -> Reconfigure Chip_0 from RAM "(93)A49596979800" to ROM "(D3)A49596979800"
[OFF] [ON] -> Activate the configuration
After Configuration
Code:
Chip_# Addr. Configuration Description LCIM Type Size Port
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_0 2C000 CONF D
Chip_0 2C001 F-BLOCK 3 HC E0000 T41 ROM (done) 1 ROM 32 n/a
New configuration after HC-TRANS41 has been mapped & activated
The action to remap Chip_0 from page 3 to page E has the effect to remove itself from the port assignation.
The consequence is that all the others port number has been decreased by .01.
Code:
Chip_# Addr. Configuration Description LCIM Type Size Port
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_0 2C000 CONF D
Chip_0 2C001 F-BLOCK 3 HC E0000 T41 ROM (done) 1 ROM 32 n/a
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_1 2C002 CONF A
Chip_1 2C003 F-BLOCK 4 16KB SC T41 ROM (planned) 1 RAM 16 5.00
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_2 2C004 CONF 9
Chip_2 2C005 F-BLOCK 5 32KB Math ROM (planned) 1 RAM 32 5.01
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_3 2C006 CONF 9
Chip_3 2C007 F-BLOCK 6 32KB JPC ROM (planned) 1 RAM 32 5.02
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_4 2C008 CONF 9
Chip_4 2C009 F-BLOCK 7 32KB Backup (planned) 1 RAM 32 5.03
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_5 2C00A CONF 9
Chip_5 2C00B F-BLOCK 8 32KB FRAM71TK IRAM (done) 1 RAM 32 5.04
------ ----- ------------- -------------------------- ---- ----- ---- ----
Load SC-TRANS41
Load the visible part of the HP41 Translator ROM
Before Configuration
Code:
Chip_# Addr. Configuration Description LCIM Type Size Port
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_1 2C002 CONF A
Chip_1 2C003 F-BLOCK 4 16KB SC T41 ROM (planned) 1 RAM 16 5.00
Load SC-TRANS41 image file
Code:
FREE PORT(5) [ENTER] -> Create an IRAM for SC-TRANS41
ROMCOPY TRANS41:TAPE TO :PORT(5) [ENTER] -> copy SC-TRANS41 to new IRAM
Remove IRAM identifier
Code:
RUN MEMBUF [ENTER] -> Port Dev Seq Size Addr Type Comment
-> 5 0 0 16 78000 1 SC TRANS41 IRAM
-> Warning: for the following commands, use your address if different
PEEK$(“78000”,8) [ENTER] -> Show “B3DDDDDE” IRAM identifier
POKE ”78000”,”00000000” [ENTER] -> Remove the IRAM identifier
PEEK$(“78000”,8) [ENTER] -> “00000000” validates the removal of the IRAM identifier
Reconfigure module type
Code:
POKE "2C000","D3E49596979800" [ENTER] -> Reconfigure RAM "D3(A4)9596979800" to ROM "D3(E4)9596979800"
[OFF] [ON] -> Activate the configuration
RUN MEMBUF [ENTER] -> Port Dev Seq Size Addr Type Comment
-> 5 0 0 16 78000 2 SC TRANS41 ROM
Final validation
Code:
VER$ [ENTER] -> HP71:1BBBB HPIL:1B FTH41:1A EDT:A RCPY:E
HP41 [ENTER] -> “HP41 EMULATOR 1A” then SIZE ( max. 10000 ) ?
31 [ENTER] -> 0 (the emulator has now 31 data registers)
5 3 + [ENTER] -> 8
BYE [ENTER] -> leave TRANS41 and back to BASIC
After Configuration
Code:
Chip_# Addr. Configuration Description LCIM Type Size Port
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_1 2C002 CONF E
Chip_1 2C003 F-BLOCK 4 16KB SC T41 ROM (done) 1 ROM 16 5.00
Loading the LIF file where the MATH image is located
ILPer: fill the "Mass Storage LIF file" with the LIF image: 71ROM2V2.LIF
Load MATH ROM
The following steps will load the Math ROM
Before Configuration
Code:
Chip_# Addr. Configuration Description LCIM Type Size Port
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_2 2C004 CONF 9
Chip_2 2C005 F-BLOCK 5 32KB Math ROM (planned) 1 RAM 32 5.01
Load MATH image file
Code:
FREE PORT(5.01) [ENTER] -> Create an IRAM for MATH ROM
COPY MATHLEX:TAPE TO :PORT(5.01) [ENTER] -> copy MATH ROM to new IRAM
Remove IRAM identifier
Code:
RUN MEMBUF [ENTER] -> Port Dev Seq Size Addr Type Comment
-> 5 1 0 32 D0000 1 MATH IRAM
-> Warning: for the following commands, use your address if different
PEEK$(“D0000”,8) [ENTER] -> “B3DDDDDE” IRAM identifier
POKE ”D0000”,”00000000” [ENTER] -> Remove the IRAM identifier
PEEK$(“D0000”,8) [ENTER] -> “00000000” validates the removal of the IRAM identifier
Reconfigure module type
Code:
POKE "2C000","D3E4D596979800" [ENTER] -> Reconfigure RAM "D3E4(95)96979800" to ROM "D3E4(D5)96979800"
[OFF] [ON] -> Activate the configuration
RUN MEMBUF [ENTER] -> Port Dev Seq Size Addr Type Comment
-> 5 1 0 32 D0000 2 MATH ROM
Final validation
Code:
VER$ [ENTER] -> HP71:1BBBB HPIL:1B FTH41:1A EDT:A MATH:1A RCPY:E
BVAL("1111",2) [ENTER] -> 15
After Configuration
Code:
Chip_# Addr. Configuration Description LCIM Type Size Port
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_2 2C004 CONF D
Chip_2 2C005 F-BLOCK 5 32KB Math ROM (done) 1 ROM 32 5.01
Loading the LIF file where the JPCF04 image is located
ILPer: fill the "Mass Storage LIF file" with the LIF image: 71ROM3V2.LIF
Install JPC ROM
The following steps will load the JPC ROM v.F04
Before Configuration
Code:
Chip_# Addr. Configuration Description LCIM Type Size Port
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_3 2C006 CONF 9
Chip_3 2C007 F-BLOCK 6 32KB JPC ROM (planned) 1 RAM 32 5.02
Load JPC image file
Code:
FREE PORT(5.02) [ENTER] -> Create an IRAM for JPC ROM
COPY JPCF04:TAPE TO :PORT(5.02) [ENTER] -> copy JPC ROM to new IRAM
Remove IRAM identifier
Code:
RUN MEMBUF [ENTER] -> Port Dev Seq Size Addr Type Comment
-> 5 2 0 32 C0000 1 JPC IRAM
-> Warning: for the following commands, use your address if different
PEEK$(“C0000”,8) [ENTER] -> “B3DDDDDE” IRAM identifier
POKE ”C0000”,”00000000” [ENTER] -> Remove the IRAM identifier
PEEK$(“C0000”,8) [ENTER] -> “00000000” validates the removal of the IRAM identifier
Reconfigure module type
Code:
POKE "2C000","D3E4D5D6979800" [ENTER] -> Reconfigure RAM "D3E4D5(96)979800" to ROM "D3E4D5(D6)979800"
[OFF] [ON] -> Activate the configuration
RUN MEMBUF [ENTER] -> Port Dev Seq Size Addr Type Comment
-> 5 2 0 32 C0000 2 JPC ROM
Final validation
Code:
VER$ [ENTER] -> HP71:1BBBB FTH41:1A EDT:A MATH:1A JPC:F04 HPIL:1B RCPY:E
ATH$("123") [ENTER] -> 132333
After Configuration
Code:
Chip_# Addr. Configuration Description LCIM Type Size Port
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_3 2C006 CONF D
Chip_3 2C007 F-BLOCK 6 32KB JPC ROM (done) 1 ROM 32 5.02
Create Backup 32KB IRAM
Allocate a protected memory against Memory Lost for program and data backup
Before Configuration
Code:
Chip_# Addr. Configuration Description LCIM Type Size Port
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_4 2C008 CONF 9
Chip_4 2C009 F-BLOCK 7 32KB Backup (planned) 1 RAM 32 5.03
Create IRAM
Code:
FREE PORT(5.03) [ENTER] -> Create an IRAM for Backup (Data & Programs)
After Configuration
Code:
Chip_# Addr. Configuration Description LCIM Type Size Port
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_4 2C008 CONF 9
Chip_4 2C009 F-BLOCK 7 32KB Backup IRAM (done) 1 RAM 32 5.03
Adding 160KB RAM to main RAM
Code:
POKE "2C000","D3E4D5D69798191A1B1C9D00" [ENTER] -> Adding 160KB : "D3E4D5D69798(191A1B1C9D)00"
RUN MEMBUF [ENTER] -> Port Dev Seq Size Addr Type Comment
-> 5 5 0 160 40000 0 RAM
MEM [ENTER] -> You should have around 210KB
Cleaning the ROM testing section
Reclaiming the ROM testing space for future ROM
Backup utilities
Code:
COPY ROMCOPY:PORT(5.04) TO :PORT(5.03) [ENTER] -> Needed to load ROM Images
VER$ [ENTER] -> HP71:1BBBB FTH41:1A EDT:A MATH:1A JPC:F04 HPIL:1B RCPY:E RCPY:E
Removing FRAM71TK from memory
Code:
CLAIM PORT(5.04) [ENTER] -> Integrating the IRAM back into main RAM and in so clearing its content
FREE PORT(5.04) [ENTER] -> Recreating the IRAM space for ROM testing
VER$ [ENTER] -> HP71:1BBBB FTH41:1A EDT:A MATH:1A JPC:F04 HPIL:1B RCPY:E
Final Configuration
The following table show the final configuration of the FRAM71 for this example.
Code:
Chip_# Addr. Configuration Description of LCIM Type Size Port
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_0 2C000 CONF D
Chip_0 2C001 F-BLOCK 3 HC E0000 T41 ROM 1 ROM 32 n/a
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_1 2C002 CONF E
Chip_1 2C003 F-BLOCK 4 16KB SC T41 ROM 1 ROM 16 5.00
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_2 2C004 CONF D
Chip_2 2C005 F-BLOCK 5 32KB Math ROM 1 ROM 32 5.01
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_3 2C006 CONF D
Chip_3 2C007 F-BLOCK 6 32KB JPC ROM 1 ROM 32 5.02
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_4 2C008 CONF 9
Chip_4 2C009 F-BLOCK 7 32KB Backup IRAM 1 RAM 32 5.03
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_5 2C00A CONF 9
Chip_5 2C00B F-BLOCK 8 32KB ROM Testing IRAM 1 RAM 32 5.04
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_6 2C00C CONF 1
Chip_6 2C00D F-BLOCK 9 System RAM 160KB 1 of 5 0 RAM 32 5.05
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_7 2C00E CONF 1
Chip_7 2C00F F-BLOCK A System RAM 160KB 2 of 5 0 RAM 32 5.05
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_8 2C010 CONF 1
Chip_8 2C011 F-BLOCK B System RAM 160KB 3 of 5 0 RAM 32 5.05
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_9 2C012 CONF 1
Chip_9 2C013 F-BLOCK C System RAM 160KB 4 of 5 0 RAM 32 5.05
------ ----- ------------- -------------------------- ---- ----- ---- ----
Chip_A 2C014 CONF 9
Chip_A 2C015 F-BLOCK D System RAM 160KB 5 of 5 1 RAM 32 5.05
------ ----- ------------- -------------------------- ---- ----- ---- ----
Thats it! ... Have fun!
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FRAM71 Configuration Example (Intermediate Level) [2017-01-24]
