HP25 RAM

[Alexanderpentagon]

Thank You!
I suppose there are not changes from the classic calc to the woodstock
Now I can start to project !
I'll make a level translator or use LTC1045.....
KR
Alex

(09-02-2021 01:42 AM)teenix Wrote:  As Tony Duell mentioned in the Forum article, you will have to implement serial data flow for instruction decoding to read and write RAM.

Clear Data Registers
c -> data address
c -> data
data -> C
c -> data register n (Where n can be RAM address 0 - 15)
data register n -> c (Where n can be RAM address 0 - 15)

These all have to be structured inside the 56 bit instruction cycles. (around 320uS)
The data bus can be driven by the ARC or RAM chips
The C register is normally active on the data bus unless a RAM read takes place
You will have to interface the new circuit to work in a 6 volt environment. A PIC processor for example has a maximum voltage rating which (sort of) allows 6V operation but is not recommended to operate above 5.5V. To avoid throwing the dice of chance, a better choice would be a high voltage tolerant input type or creating an interface.

There is some info on instruction flow in my Classic Notes document.

http://teenix.org/ClassicNotes.pdf

cheers

Tony