Threaded Mode | Linear Mode

Matt Agajanian · (This post was last modified: 05-30-2018 08:42 PM by Matt Agajanian.)

Hi there. Given that the HP-67 and 34C used only one I register, what are your tips & techniques for using the I register for multiple indirect registers? Thanks in advance.

Maximilian Hohmann · 05-30-2018, 09:10 PM

Hello!

(05-30-2018 08:42 PM)Matt Agajanian Wrote: Hi there. Given that the HP-67 and 34C used only one I register, what are your tips & techniques for using the I register for multiple indirect registers? Thanks in advance.

I have only one tip: If you want to write a program that you will still be able to understand in one year from now (or even more difficult: that you will want to explain to someone else!) don't do this kind of stuff in the first place :-)

Dieter · 05-30-2018, 09:44 PM

(05-30-2018 08:42 PM)Matt Agajanian Wrote: Hi there. Given that the HP-67 and 34C used only one I register, what are your tips & techniques for using the I register for multiple indirect registers? Thanks in advance.

There is one obvious solution: Use the registers you want and store them into I before the indirect command.

Example: multiply the contents of the registers indexed by R3 and R4.

Code:

RCL 3

STO I

RCL(i)

RCL 4

STO I

R↓

RCL(i)

x

Don't like this? Get a 35s (two index registers). Or an HP41/42 (essentially any register can be used for indirection).

Dieter

Matt Agajanian · 05-30-2018, 10:34 PM

(05-30-2018 09:44 PM)Dieter Wrote:
(05-30-2018 08:42 PM)Matt Agajanian Wrote: Hi there. Given that the HP-67 and 34C used only one I register, what are your tips & techniques for using the I register for multiple indirect registers? Thanks in advance.

There is one obvious solution: Use the registers you want and store them into I before the indirect command.

Example: multiply the contents of the registers indexed by R3 and R4.

Code:

RCL 3 STO I RCL(i) RCL 4 STO I R↓ RCL(i) x

Don't like this? Get a 35s (two index registers). Or an HP41/42 (essentially any register can be used for indirection).

Dieter

This is good! That helps! I’m just looking to your (MoHPC members’) expertise on how to streamline this approach so as to minimize program steps to keep this exchange as low in keystrokes as possible.

Thanks

Csaba Tizedes · 05-31-2018, 05:41 PM

(05-30-2018 08:42 PM)Matt Agajanian Wrote: Hi there. Given that the HP-67 and 34C used only one I register, what are your tips & techniques for using the I register for multiple indirect registers? Thanks in advance.

Hi, interesting question, but I can not understand exactly. Can you post an example? Have you any practical application on it?

Thanks,
Csaba

Matt Agajanian · (This post was last modified: 05-31-2018 06:10 PM by Matt Agajanian.)

(05-31-2018 05:41 PM)Csaba Tizedes Wrote:
(05-30-2018 08:42 PM)Matt Agajanian Wrote: Hi there. Given that the HP-67 and 34C used only one I register, what are your tips & techniques for using the I register for multiple indirect registers? Thanks in advance.

Hi, interesting question, but I can not understand exactly. Can you post an example? Have you any practical application on it?

Thanks,
Csaba

For example, consider how matrix operations are calculated given that the elements for say, inversion or martrix multiplication are using elements in different matrix positions and thus, different register locations.

Dieter · 05-31-2018, 06:58 PM

(05-31-2018 06:09 PM)Matt Agajanian Wrote: For example, consider how matrix operations are calculated given that the elements for say, inversion or martrix multiplication are using elements in different matrix positions and thus, different register locations.

Yes, matrices are a truly classic application for multiple index registers. That's why I didn't start writing such programs before I had an HP-41. ;-)
Here you can easily code such things as

RCL IND 03
RCL IND 04
x
ST– IND 05

Dieter

Matt Agajanian · 05-31-2018, 07:20 PM

(05-31-2018 06:58 PM)Dieter Wrote:
(05-31-2018 06:09 PM)Matt Agajanian Wrote: For example, consider how matrix operations are calculated given that the elements for say, inversion or martrix multiplication are using elements in different matrix positions and thus, different register locations.

Yes, matrices are a truly classic application for multiple index registers. That's why I didn't start writing such programs before I had an HP-41. ;-)
Here you can easily code such things as

RCL IND 03
RCL IND 04
x
ST– IND 05

Dieter

Thanks.
I’m glad you see my reasons for asking the question.

Just so you know, although the SR-52 was TI’s answer to the HP-65, I wonder how (if the HP-67 was HP’s comeback to the 52), the 67 answered the challenge of the SR-52’s multiple indirect registers and the EXC (TI’s Exchange memory) commands.

Valentin Albillo · (This post was last modified: 05-31-2018 09:13 PM by Valentin Albillo.)

(05-31-2018 07:20 PM)Matt Agajanian Wrote: I wonder how (if the HP-67 was HP’s comeback to the 52), the 67 answered the challenge of the SR-52’s multiple indirect registers and the EXC (TI’s Exchange memory) commands.

Tht HP-67 did just fine in that regard, you could use the X<>I and P<>S instructions to mimic having indirect access to different registers simultaneously.

V.
.
PS: Edited to remove the name of a third person I shouldn't have mentioned in the first place. My apologies.
.

Maximilian Hohmann · 05-31-2018, 08:11 PM

(05-31-2018 07:59 PM)Valentin Albillo Wrote: ...as well as assisting him in passing some difficult engineering exams at the time. ...

Passing an engineering exam can't be a matter of being able to afford the right calculator at the right time. Sorry for the thread drift, but I passed my (equally difficult) engineering exams in a time when an HP-67 would have been really nice to have without being able to afford one. Passing these exams required showing that one had understood the principle, not actually solving the problem with numbers. And in real engineering life those systems do not have 7 equations but 700.

Archilog · (This post was last modified: 06-01-2018 06:46 PM by Archilog.)

Hello,
I did this using fractional part of index number on my HP-29C. I have to admit it is VERY expensive in RAM steps. Dieter's method is better.

Matt Agajanian · 06-01-2018, 12:41 AM

Hi there. I decided to take a look at the programs here: Program Library U for RPN-67/97

and try to learn the indirect memory addressing techniques from some of these program cards for matrix operations, linear equations, and polynomial evaluations.

Dieter · 06-01-2018, 11:21 AM

(05-30-2018 09:44 PM)Dieter Wrote: Example: multiply the contents of the registers indexed by R3 and R4.

Code:

RCL 3 STO I RCL(i) RCL 4 STO I R↓ RCL(i) x

If only two index registers are required, one of them may be "I". So only when the second index register is used it has to be temporarily get swapped with "I".

Example: mulitply the contents of the registers indexed by R2 and RI:

Code:

RCL 2

X<>I

RCL(i)

X<>I

R↓

X<>I

RCL(i)

x

This method has an advantage if in the most cases "I" is used as the index register so that the second one (here R2) that requires the above code is used much less.

Dieter

Matt Agajanian · 06-01-2018, 03:01 PM

(06-01-2018 11:21 AM)Dieter Wrote:
(05-30-2018 09:44 PM)Dieter Wrote: Example: multiply the contents of the registers indexed by R3 and R4.

Code:

RCL 3 STO I RCL(i) RCL 4 STO I R↓ RCL(i) x

If only two index registers are required, one of them may be "I". So only when the second index register is used it has to be temporarily get swapped with "I".

Example: mulitply the contents of the registers indexed by R2 and RI:

Code:

RCL 2 X<>I RCL(i) X<>I R↓ X<>I RCL(i) x

This method has an advantage if in the most cases "I" is used as the index register so that the second one (here R2) that requires the above code is used much less.

Dieter

Thank you for being so helpful with my questions. Much appreciated.

Csaba Tizedes · 06-03-2018, 06:15 PM

(05-31-2018 06:58 PM)Dieter Wrote:
(05-31-2018 06:09 PM)Matt Agajanian Wrote: For example, consider how matrix operations are calculated given that the elements for say, inversion or martrix multiplication are using elements in different matrix positions and thus, different register locations.

Yes, matrices are a truly classic application for multiple index registers. That's why I didn't start writing such programs before I had an HP-41. ;-)
Dieter

Hi, I found something from the past: nested loops with one index register for HP-15C (I have not checked Wink

I am sure it can be optimize, but maybe it give some idea for somebody):

Quote:Nested loops
Message #9 Posted by Tizedes Csaba on 11 July 2003, 11:00 a.m.,
in response to message #8 by Tizedes Csaba
Hi All!

I wrote this program about four years ago.

General method:

Code:

-------- LBL 0 1 STO I -------- LBL 1 RCL RR2 STO 2 1 STO + I -------- LBL 2 RCL RR3 STO 3 1 STO + I -------- . . . -------- LBL n-1 RCL RRn STO n 1 STO + I -------- LBL n ####################### # # # Loop's instructions # # # ####################### ISG (i) GTO I -------- LBL decrement DSE I GTO jump RTN -------- LBL jump ISG (i) GTO I GTO decrement --------

RR2, RR3, ..., RRn contains original value of loop counters (2nd, 3rd, ..., nth registers of calculator) Before running it must be set.

An example: Calculate how many 3*4*5:

Code:

LBL 1 RCL 5 STO 2 1 STO + I LBL 2 RCL 6 STO 3 1 STO + I LBL 3 1 STO + 0 ISG (i) GTO I LBL 8 DSE I GTO 9 RCL 0 RTN LBL 9 ISG (i) GTO I GTO 8 For running: 1.003 STO 1 1.004 STO 5 1.005 STO 6 1 STO I GSB 1

Csaba

Dieter · 06-03-2018, 06:41 PM

(06-03-2018 06:15 PM)Csaba Tizedes Wrote: Hi, I found something from the past: nested loops with one index register for HP-15C (I have not checked I am sure it can be optimize, but maybe it give some idea for somebody):

I'm not sure if I get your point here, so let me ask:

- As far as I can see this method does not handle multiple index registers for cases where data registers have to be stored or recalled, i.e. something like RCL IND 03 and RCL IND 04 on an HP-41.

- However, the example handles multiple loop counters. But... the 15C does not restrict DSE and ISG to the I-register (as the HP67, 34C and others do). Unlike these it directly supports ISG and DSE for any register, e.g. ISG 3 or DSE ,4.

So I'd like to ask where the benefit of the proposed method is.

Dieter

Matt Agajanian · 06-04-2018, 03:39 PM

Thank you all for helping me with this. Yes, while stepping back from my question, I realise that I should develop programs keeping the I register’s fixed position in mind. Thus, the I register location is meant not to disrupt the contiguous memory registers’ sequential numbering.

That being said, I understand that, although the SR-52, TI-58/59 and others which allowed the user-selectable choice of I register usage, using a fixed-point I register locale has its benefits and encourages a structured program development for indirect addressing just as HP-65’s usage of a dedicated register for looping (for example) provides a fixed/dedicated memory locale for looping.